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LC79451KB Scheda tecnica(PDF) 10 Page - ON Semiconductor |
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LC79451KB Scheda tecnica(HTML) 10 Page - ON Semiconductor |
10 / 38 page LC79451KB No.A2223-10/38 5-5. I 2C (2-wire serial interface) Timing Characteristics (Case without the special mention VDD = +2.5V, VSS = 0V, Ta = +25°C) Parameter Symbol Conditions min typ max Unit SCL frequency fSCL(1) - - 400 kHz Start condition setup time tSU(5) 600 - - ns Start condition hold time tHD(3) 600 - - ns SDA rise time trDA(1) - - 300 ns SDA fall time tfDA(1) - - 300 ns SCL rise time trCL(1) - - 300 ns SCL fall time tfCL(1) - - 300 ns SCL low pulse width tPW(3) 1300 - - ns SCL high pulse width tPW(2) 600 - - ns Data setup time tSU(6) 100 - - ns Data hold time tHD(4) 0 - 900 ns Stop condition setup time tSU(7) 600 - - ns STOP - START bus open time tBUF 1300 - - ns 1) I2C interface bus timing Fig.5. I 2C bus timing 2) Timing of BUSY and START Flag after setting START command in I2C interface Output of BUSY means START Flag. During in BUSY = 1, “WAVEFORM PARAMETER” and “CONTROL REGISTER” are write inhibit state. An internal state is charge-pump rising period before the waveform output or during the waveform output. After outputs waveform from segment, BUSY and START Flag are automatically canceled. (Cf. 6-3) *1 Automatic charge-pump mode : charge-pump rising period (set to control register 1) + waveform output period (set to waveform parameter) Manual charge-pump mode : waveform output period (set to waveform parameter) *2 BUSY and START Flag are automatically canceled. Fig.6. I 2C BUSY output, and START Flag timing (90%) tSU(7) tPW(3) tfDA(1) tSU(5) tHD(4) tHD(3) SCL trDA(1) SDA trCL(1) tfCL(1) tPW(2) START condition Acknowledge (ACK) STOP condition tBUF tSU(6) (90%) (10%) (10%) SCL BUSY START Flag *1 (ACK) *2 |
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