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SM39R04G1 Scheda tecnica(PDF) 10 Page - SyncMOS Technologies,Inc

Il numero della parte SM39R04G1
Spiegazioni elettronici  4K Bytes on-chip flash program memory
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Produttore elettronici  SYNCMOS [SyncMOS Technologies,Inc]
Homepage  http://www.syncmos.com.tw
Logo SYNCMOS - SyncMOS Technologies,Inc

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SM39R04G1
8-Bit Micro-controller
4KB with ISP Flash
& 256B RAM embedded
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M053
10
Ver.H
SM39R04G1
08/2013
Function Description
1.
General Features
SM39R04G1 is an 8-bit micro-controller。All of its functions and the detailed meanings of SFR will be given in the following
sections。
1.1.
Embedded Flash
The program can be loaded into the embedded 4KB Flash memory via its writer or In-System Programming (ISP)。The
high-quality Flash has a 100K-write cycle life,suitable for re-programming and data recording as EEPROM。
1.2.
IO Pads
The SM39R04G1 has two I/O ports: Port 1 and Port 3. Ports 3 are 8-bit ports and Port 1 is a 4-bit port (The 10L MSOP
only have 8-bit Port 3).These are: quasi-bidirectional (standard 8051 port outputs), push-pull, open drain, and input-only.
As description in section 5。
At 14L Package (DIP/SOP),the Int0、Int1、T0、T1 signal can be configured to other I/O as below:
Signal
Default
Option1
Option2
#INT0
5(P3.2)
1(P3.0)
12(P3.6)
#INT1
6(P3.3)
2(P3.1)
13(P3.7)
T0
10(P3.4)
12(P3.6)
1(P3.0)
T1
11(P3.5)
13(P3.7)
2(P3.1)
At 10L Package (MSOP),the Int0、Int1、T0、T1 signal can be configured to other I/O as below:
Signal
Default
Option1
Option2
#INT0
8(P3.6)
1(P3.0)
8(P3.6)
#INT1
9(P3.7)
2(P3.1)
9(P3.7)
T0
8(P3.6)
8(P3.6)
1(P3.0)
T1
9(P3.7)
9(P3.7)
2(P3.1)
The RESET Pin Can Be configured as I/O port P3.6,when user use on-chip hardware RESET mechanism。
The XTAL2 and XTAL1 can be configured as I/O port by ICP or in ISP mode,when user use external OSC or on-chip RC
Oscillator is set to main system clock source,show as below:
External OSC
Internal OSC
14L Package
Xtal1
Xtal1
P1.3
Xtal2
P1.2
P1.2
10L Package
Xtal1
Xtal1
P3.3
Xtal2
P3.2
P3.2
All the pins on P1 and P3 are with slew rate adjustment to reduce EMI. The other way to reduce EMI is to disable the ALE
output if unused. This is selected by its SFR. The IO pads can withstand 4KV ESD in human body mode guaranteeing the
SM39R04G1
’s quality in high electro-static environments.
1.3.
Instruction timing Selection
The conventional 52-series MCUs are 12T, i.e., 12 oscillator clocks per machine cycle.
SM39R04G1 is a 1T to 8T MCU,
i.e., its machine cycle is one-clock to eight-clock. In the other words, it can execute one instruction within one clock to only
eight clocks.


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