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ISL22317UFRTZ Scheda tecnica(PDF) 2 Page - Intersil Corporation

Il numero della parte ISL22317UFRTZ
Spiegazioni elettronici  Low Noise, Low Power, I2C??Bus, 128 Taps
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Produttore elettronici  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL22317UFRTZ Scheda tecnica(HTML) 2 Page - Intersil Corporation

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2
FN6912.1
April 15, 2010
Block Diagram
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
RESISTANCE OPTION
(k
Ω)
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL22317TFRTZ
317T
100
-40 to +125
10 Ld TDFN
L10.3x3B
ISL22317UFRTZ
317U
50
-40 to +125
10 Ld TDFN
L10.3x3B
ISL22317WFRTZ
317W
10
-40 to +125
10 Ld TDFN
L10.3x3B
NOTES:
1. Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL22317. For more information on MSL please see techbrief
TB363.
SCL
SDA
RREF
POWER-UP,
INTERFACE,
RH
RL
RW
GND
10k
Ω 0.5%
External Resistor
A1
VCC
REF_A
REF_B
for W option,
respectively
EEPROM
AND
CONTROL
LOGIC
or 50k
Ω 0.5%
for U and T options
Pinout
ISL22317
(10 LD TDFN)
TOP VIEW
2
3
4
1
5
9
8
7
10
6
SCL
SDA
A1
REF_A
REF_B
VCC
RH
RW
RL
GND
Pin Descriptions
TDFN
PIN #
SYMBOL
DESCRIPTION
1
SCL
Open drain I2C interface clock input
2
SDA
Open drain Serial data I/O for the I2C interface
3
A1
Device address input for the I2C interface
4
REF_A
Terminal A for an external reference resistor
5
REF_B
Terminal B for an external reference resistor
6
GND
Device ground pin
7
RL
“Low” terminal of DCP
8
RW
“Wiper” terminal of DCP
9
RH
“High” terminal of DCP
10
VCC
Power supply pin
EPAD*
Exposed Die Pad internally connected to
GND
*PCB thermal land for QFN/TDFN EPAD should be connected to
GND plane or left floating. For more information refer to
http://www.intersil.com/data/tb/TB389.pdf
ISL22317


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