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ISL1561IRZ-T13 Scheda tecnica(PDF) 10 Page - Intersil Corporation |
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ISL1561IRZ-T13 Scheda tecnica(HTML) 10 Page - Intersil Corporation |
10 / 13 page ISL1561 10 FN7941.1 February 26, 2013 General Description The ISL1561 is a class G amplifier designed to reduce power consumption in ADSL2+ and VDSL2 applications compared to class AB. With the high PAR used for xDSL signals, a supply voltage of +14V can be used for the majority of the small amplitude cycles while boosting to a supply voltage of +28V can be used for the few high amplitude cycles. Digital Interface A 12-bit serial port interface is used to program ISL1561. The first bit defines the write (1’b1) and read (1’b0) operation to the register. The following 3-bit calls the registers. The last 8-bit programs the registers. Default start-up for ISL1561 is in disable mode with boost and CS pins having internal pull ups and SCLK and SDATA pins having internal pull downs. ISL1561 can only be programmed through the SPI when CS is set low. Register Listing ADDRESS FUNCTION BIT DESCRIPTION 3’h3 Setting of quiescent current of port AB [7] Boost disable [6:0] Program quiescent current of port AB. 3’h7 Setting of quiescent current of port CD [7] Boost disable [6:0] Program quiescent current of port CD. FIGURE 27. 12 BITS SERIAL ADDRESSING DIAGRAM FIGURE 28. 12 BITS SERIAL ADDRESSING DIAGRAM CS 12 3 0 Z-HI Z-HI SCLK SDATA D[0] ADDR[0:2] CURRENT SETTING VALUE D[1] D[2] D[3] D[4] D[5] D[6] D[7] W/R BN B(N-1) B(N-2) B1 B0 SCLK SDATA LSB MSB t tSD tHD ttr tw LOAD LSB FIRST, MSB LAST tf CS tSC tHC tSC |
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