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ES1DFL Scheda tecnica(PDF) 1 Page - Taiwan Semiconductor Company, Ltd |
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ES1DFL Scheda tecnica(HTML) 1 Page - Taiwan Semiconductor Company, Ltd |
1 / 4 page CREAT BY ART - Glass passivated junction chip - Ideal for automated placement - Low profile package - Low power loss, high efficiency - Halogen-free according to IEC 61249-2-21 Molding compound, UL flammability classification rating 94V-0 Moisture sensitivity level: level 1, per J-STD-020 Packing code with suffix "G" means green compound (halogen-free) Terminal: Matte tin plated leads, solderable per JESD22-B102 Meet JESD 201 class 1A whisker test SYMBOL ES1DFL ES1GFL ES1JFL UNIT EDF EGF EJF VRRM 200 400 600 V VRMS 140 280 420 V VDC 200 400 600 V IF(AV) A CJ pF trr ns TJ °C TSTG °C Document Number: DS_D0000120 Version: A15 8 SOD-123FL 1 30 1.00 1.30 1.70 ES1DFL - ES1JFL 1A, 200V - 600V Surface Mount Super Fast Rectifiers FEATURES - Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC MECHANICALW DATA Case: SOD-123FL Polarity: Indicated by cathode band Weight: 0.016 g (approximately) MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS (TA=25°C unless otherwise noted) Maximum repetitive peak reverse voltage PARAMETER IR μA Maximum RMS voltage Maximum DC blocking voltage Maximum average forward rectified current Marking Code Maximum reverse recovery time (Note 3) Typical thermal resistance RθJL RθJA Maximum reverse current @ rated VR TJ=25°C TJ=125°C A Maximum instantaneous forward voltage (Note 1) @ 1 A VF V °C/W 100 35 IFSM Typical junction capacitance (Note 2) Peak forward surge current, 8.3 ms single half sine-wave superimposed on rated load Note 3: Reverse Recovery Test Conditions: IF=0.5A, IR=1.0A, IRR=0.25A Taiwan Semiconductor 35 85 Operating junction temperature range Storage temperature range Note 1: Pulse test with PW=300μs, 1% duty cycle - 55 to +150 - 55 to +150 5 Note 2: Measured at 1 MHz and Applied VR=4.0 Volts. |
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