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74HC_HCT126 Scheda tecnica(PDF) 8 Page - NXP Semiconductors |
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74HC_HCT126 Scheda tecnica(HTML) 8 Page - NXP Semiconductors |
8 / 16 page 74HC_HCT126 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 3 — 22 September 2014 8 of 16 NXP Semiconductors 74HC126; 74HCT126 Quad buffer/line driver; 3-state Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 8. Test circuit for measuring switching times Table 9. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC126 VCC 6ns 15pF, 50 pF 1k open GND VCC 74HCT126 3 V 6 ns 15 pF, 50 pF 1 k open GND VCC |
Codice articolo simile - 74HC_HCT126_15 |
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Descrizione simile - 74HC_HCT126_15 |
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