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74ALVCH16501 Scheda tecnica(PDF) 5 Page - NXP Semiconductors |
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74ALVCH16501 Scheda tecnica(HTML) 5 Page - NXP Semiconductors |
5 / 18 page 74ALVCH16501 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 5 — 10 July 2012 5 of 18 NXP Semiconductors 74ALVCH16501 18-bit universal bus transceiver; 3-state 6. Functional description 6.1 Function table [1] A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA and CPBA. H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the enable or clock transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the enable or clock transition; X = don’t care; Z = high-impedance OFF-state; = HIGH-to-LOW clock transition; = LOW-to-HIGH clock transition. 7. Limiting values CPBA 30 clock input B-to-A B0 to B17 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 data inputs or outputs CPAB 55 clock input A-to-B Table 2. Pin description …continued Symbol Pin Description Table 3. Function table[1] Inputs Output Operating mode OEAB LEAB CPAB An Bn L X X X Z disabled H H X H H transparent H H X L L H X h H latch data and display H X l L H L h H clock data and display H L l L H L H or L X H hold data and display H L H or L X L Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +4.6 V IIK input clamping current VI < 0 V 50 - mA VI input voltage control inputs [1] 0.5 +4.6 V data inputs [1] 0.5 VCC + 0.5 V IOK output clamping current VO > VCC or VO < 0 V - 50 mA VO output voltage [1] 0.5 VCC + 0.5 V IO output current VO = 0 V to VCC - 50 mA ICC supply current - 100 mA |
Codice articolo simile - 74ALVCH16501_15 |
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Descrizione simile - 74ALVCH16501_15 |
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