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LF3338QC12 Scheda tecnica(PDF) 8 Page - LOGIC Devices Incorporated

Il numero della parte LF3338QC12
Spiegazioni elettronici  8-Bit Vertical Digital Image Filter
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Produttore elettronici  LODEV [LOGIC Devices Incorporated]
Homepage  http://www.logicdevices.com
Logo LODEV - LOGIC Devices Incorporated

LF3338QC12 Scheda tecnica(HTML) 8 Page - LOGIC Devices Incorporated

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DEVICES INCORPORATED
LF3338
8-Bit Vertical Digital Image Filter
8
Video Imaging Products
04/06/1999–LDS.3338-B
ADDR1
DATA1
LIMIT REGISTER
CLK
W1
W1: Limit Register loaded with new data on this rising clock edge.
DATA2
DATA3
DATA4
LD
CF11-0
PAUSE
limit is stored in bits 31-16. RSL3-0
determines which limit register is
used for limiting when limiting is
enabled. Configuration and control
register loading is discussed in the
LF InterfaceTM section.
TABLE 10.
COEFFICIENT BANK LOADING FORMAT
CF11
CF10
CF9
CF8
CF7
CF6
CF5
CF4
CF3
CF2
CF1
CF0
1st Word - Address
0
0
0000001010
2nd Word - Bank 0
0
0
1000010000
3rd Word - Bank 1
0
1
0101000011
4th Word - Bank 2
1
1
0001110110
5th Word - Bank 3
1
0
0111100011
6th Word - Bank 4
0
1
1100000001
7th Word - Bank 5
1
0
0000110010
8th Word - Bank 6
1
1
1100100000
9th Word - Bank 7
0
0
0101000011
FIGURE 11. LIMIT REGISTER LOADING SEQUENCE WITH PAUSE IMPLEMENTATION
LF InterfaceTM
The LF InterfaceTM is used to load
data into the coefficient banks and
configuration/control registers. LD
is used to enable and disable the
LF InterfaceTM. When LD goes LOW,
the LF InterfaceTM is enabled for data
input. The first value fed into the
interface on CF11-0 is an address
which determines what the interface
is going to load. The three most
ADDR1
DATA1
ROUND REGISTER
CLK
LD
CF11-0
W1
W1: Round Register loaded with new data on this rising clock edge.
PAUSE
DATA2
DATA3
DATA4
FIGURE 10. ROUND REGISTER LOADING SEQUENCE WITH PAUSE IMPLEMENTATION


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