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IRLR2908 Scheda tecnica(PDF) 8 Page - Kersemi Electronic Co., Ltd. |
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IRLR2908 Scheda tecnica(HTML) 8 Page - Kersemi Electronic Co., Ltd. |
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8 / 11 page  Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer P.W. Period di/dt Diode Recovery dv/dt Ripple ≤ 5% Body Diode Forward Drop Re-Applied Voltage Reverse Recovery Current Body Diode Forward Current VGS=10V VDD ISD Driver Gate Drive D.U.T. ISD Waveform D.U.T. VDS Waveform Inductor Curent D = P.W. Period * VGS = 5V for Logic Level Devices * + - + + + - - - RG VDD • dv/dt controlled by RG • Driver same type as D.U.T. • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test D.U.T VDS 90% 10% VGS td(on) tr td(off) tf VDS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % RD VGS RG D.U.T. 10V + -VDD Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms IRLR2908/IRLU2908 2014-8-25 8 www.kersemi.com |
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