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AD14060L Scheda tecnica(PDF) 7 Page - Analog Devices |
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AD14060L Scheda tecnica(HTML) 7 Page - Analog Devices |
7 / 48 page AD14060/AD14060L Rev. B | Page 7 of 48 Table 6. Timer 5 V 3.3 V Parameter Min Max Min Max Unit Timer Switching Characteristic: tDTEX CLKIN High to TIMEXP 16 16 ns CLKIN TIMEXP tDTEX tDTEX Figure 5. Timer Table 7. Flags 5 V 3.3 V Parameter Min Max Min Max Unit Flags Timing Requirements: tSFI FLAG2-0IN Setup before CLKIN High1 8 + 5 DT/16 8 + 5 DT/16 ns tHFI FLAG2-0IN Hold after CLKIN High1 0.5 − 5 DT/16 0.5 − 5 DT/16 ns tDWRFI FLAG2-0IN Delay after RD/WR Low1 4.5 + 7 DT/16 4.5 + 7 DT/16 ns tHFIWR FLAG2-0IN Hold after RD/WR De-asserted1 0.5 0.5 ns Switching Characteristics: tDFO FLAG2-0OUT Delay after CLKIN High 17 17 ns tHFO FLAG2-0OUT Hold after CLKIN High 4 4 ns tDFOE CLKIN High to FLAG2-0OUT Enable 3 3 ns tDFOD CLKIN High to FLAG2-0OUT Disable 15 15 ns 1 Flag inputs that meet these setup and hold times affect conditional instructions in the following instruction cycle. CLKIN FLAG2–0OUT FLAG OUTPUT tDFO tHFO tDFO CLKIN RD, WR FLAG INPUT tSFI tHFI tHFIWR tDWRFI FLAG2–0IN tDFOE tDFOD Figure 6. Flags |
Codice articolo simile - AD14060L_15 |
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Descrizione simile - AD14060L_15 |
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