2 ADC/8 DAC with PLL,

192 kHz, 24-Bit Codec

AD1928

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother

rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

Fax: 781.461.3113

©2007-2011 Analog Devices, Inc. All rights reserved.

FEATURES

PLL-generated or direct master clock

Low EMI design

108 dB DAC/107 dB ADC dynamic range and SNR

−94 dB THD + N

3.3 V single supply

Tolerance for 5 V logic inputs

Supports 24 bits and 8 kHz to 192 kHz sample rates

Differential ADC input

Single-ended DAC output

Log volume control with autoramp function

SPI® controllable for flexibility

Software-controllable clickless mute

Software power-down

Master and slave modes up to 16-channel input/output

48-lead LQFP

APPLICATIONS

Automotive audio systems

Home theater systems

Set-top boxes

Digital audio effects processors

GENERAL DESCRIPTION

The AD1928 is a high performance, single-chip codec that

provides two analog-to-digital converters (ADCs) with differ-

ential input and eight digital-to-analog converters (DACs) with

single-ended output using the Analog Devices, Inc., patented

multibit sigma-delta (Σ-Δ) architecture. An SPI port is included,

allowing a microcontroller to adjust volume and many other

parameters. The AD1928 operates from 3.3 V digital and analog

supplies. The AD1928 is available in a 48-lead (single-ended

output) LQFP package. Other members of this family include a

differential DAC output version.

The AD1928 is designed for low EMI. This consideration is

apparent in both the system and circuit design architectures.

By using the on-board PLL to derive the master clock from the

LR clock or from an external crystal, the AD1928 eliminates the

need for a separate high frequency master clock and can be

used with a suppressed bit clock. The digital-to-analog and

analog-to-digital converters are designed using the latest

Analog Devices continuous time architectures to further

minimize EMI. By using 3.3 V supplies, power consumption is

minimized, further reducing emissions.

FUNCTIONAL BLOCK DIAGRAM

SERIAL DATA PORT

AD1928

ADC

ADC

DAC

DAC

DAC

DAC

DAC

DAC

DAC

DAC

SDATA

OUT

SDATA

IN

CLOCKS

ANALOG

AUDIO

OUTPUTS

DIGITAL

FILTER

AND

VOLUME

CONTROL

DIGITAL AUDIO

INPUT/OUTPUT

TIMING MANAGEMENT

AND CONTROL

(CLOCK AND PLL)

CONTROL PORT

SPI

ANALOG

AUDIO

INPUTS

QUAD

DEC

FILTER

48kHz/

96kHz/

192kHz

CONTROL DATA

INPUT/OUTPUT

PRECISION

VOLTAGE

REFERENCE

Figure 1.