AD1803

Mnemonic

Pin No.

I/O

Description

GENERAL-PURPOSE I/O AND

BARRIER INTERFACE SIGNALS2

G[0]3, 4

G[1]/MIC3, 5

G[2]3, 4, 6

G[3]/WAKE3, 4, 6

G[4]/MOUT3, 4

G[5]3, 4

G[6]3, 4

G[7]3, 4

14

15

13

12

11

24

23

22

I/O

I

I

I/O

I/O

O

I/O

O

I/O

I/O

I/O

General-Purpose I/O.

General-Purpose I/O.

Analog MIC Input. See Bit GPMIC in Register 0x5E.

General-Purpose I/O. Also used to select serial interface mode.

General-Purpose I/O.

Wake Interrupt Output (see the GPWAK bit in Register 0x5E). This pin selects the serial

interface mode. When serving as WAKE, this pin is driven high if selected GPIO pins receive

selected logic levels (see Register 0x52 and Register 0x4E).

General-Purpose I/O.

Monitor Output. See the Configuration 2 Register section.

General-Purpose I/O.

General-Purpose I/O.

General-Purpose I/O.

1 See the G[3]/WAKE pin and the G[2] pin for serial interface mode selection.

2 See Register 0x4C through Register 0x54 and Bank 1 Register 0x60 for the general-purpose I/O pin control.

3 By default the G[7] pin, G[6] pin, G[5] pin, G[4] pin, G[3] pin, G[2] pin, and G[1] pin serve as inputs with weak (~30 kΩ equivalent) internal pull-up devices enabled.

4 Input voltage on the G[7] pin, G[6] pin, G[5] pin, G[4] pin, G[3] pin, G[2] pin, and G[0] pin must not exceed DVDD by more than 0.3 V.

5 Input voltage on Pin G[1] must not exceed AVDD by more than 0.3 V.

6 The states of the G[3/WAKE] pin and G[2] pin are sampled when RESET is deasserted (driven from low to high) for the first time after power is applied to select AD1803 serial

interface mode. Once sampled, serial interface mode can be changed only by removing power from the AD1803.

G[3]/WAKE

G[2]

Serial interface mode

High/High

AC ‘97

Mode, primary device (ID: 00)

High Low

AC ‘97

Mode, secondary device (ID: 01)

Low High

AC ‘97

Mode, secondary device (ID: 10)

Low

Low

DSP mode

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