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MC-458CA727EFA-A75 Scheda tecnica(PDF) 1 Page - NEC

Il numero della parte MC-458CA727EFA-A75
Spiegazioni elettronici  8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE
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Produttore elettronici  NEC [NEC]
Homepage  http://www.nec.com/
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©
1999
MOS INTEGRATED CIRCUIT
MC-458CA727
8M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE
UNBUFFERED TYPE
DATA SHEET
Document No.
M14278EJ3V0DS00 (3rd edition)
Date Published
January 2000 NS CP(K)
Printed in Japan
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
The mark
• shows major revised points.
Description
The MC-458CA727EFA and MC-458CA727PFA are 8,388,608 words by 72 bits synchronous dynamic RAM module
on which 5 pieces of 128M SDRAM :
µPD45128163 are assembled.
This module provides high density and large quantities of memory in a small space without utilizing the surface-
mounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
• 8,388,608 words by 72 bits organization (ECC Type)
• Clock frequency and access time from CLK
Part number
/CAS latency
Clock frequency
Access time from CLK
(MAX.)
(MAX.)
MC-458CA727EFA-A75
CL = 3
133 MHz
5.4 ns
CL = 2
100 MHz
6.0 ns
MC-458CA727PFA-A75
CL = 3
133 MHz
5.4 ns
CL = 2
100 MHz
6.0 ns
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length (1, 2, 4, 8 and full page)
• Programmable wrap sequence (sequential / interleave)
• Programmable /CAS latency (2, 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• All DQs have 10 Ω ± 10 % of series resistor
• Single 3.3 V ± 0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles /64 ms
• Burst termination by Burst Stop command and Precharge command
• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)
• Unbuffered type
• Serial PD
5
5
5
5
5


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