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SM470R1B1MPGES Scheda tecnica(PDF) 1 Page - Texas Instruments

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Il numero della parte SM470R1B1MPGES
Spiegazioni elettronici  16/32-BIT RISC FLASH MICROCONTROLLER
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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SM470R1B1MPGES Scheda tecnica(HTML) 1 Page - Texas Instruments

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SM470R1B1M-HT
www.ti.com
SPNS155H – SEPTEMBER 2009 – REVISED SEPTEMBER 2013
16/32-BIT RISC FLASH MICROCONTROLLER
1
FEATURES
Two High-End CAN Controllers (HECC)
32-Mailbox Capacity
2
High-Performance Static CMOS Technology
Fully Compliant With CAN Protocol,
SM470R1x 16/32-Bit RISC Core ( ARM7TDMI™)
Version 2.0B
60-MHz System Clock (Pipeline Mode)
Five Inter-Integrated Circuit (I2C) Modules
Independent 16/32-Bit Instruction Set
Multi-Master and Slave Interfaces
Open Architecture With Third-Party Support
Up to 400 Kbps (Fast Mode)
Built-In Debug Module
7- and 10-Bit Address Capability
Integrated Memory
High-End Timer Lite (HET)
1M-Byte Program Flash
12 Programmable I/O Channels:
Two Banks With 16 Contiguous Sectors
12 High-Resolution Pins
64K-Byte Static RAM (SRAM)
High-Resolution Share Feature (XOR)
Memory Security Module (MSM)
High-End Timer RAM
JTAG Security Module
64-Instruction Capacity
Operating Features
External Clock Prescale (ECP) Module
Low-Power Modes: STANDBY and HALT
Programmable Low-Frequency External
Industrial Temperature Range
Clock (CLK)
470+ System Module
12-Channel, 10-Bit Multi-Buffered ADC
32-Bit Address Space Decoding
(MibADC)
Bus Supervision for Memory/Peripherals
64-Word FIFO Buffer
Digital Watchdog (DWD) Timer
Single- or Continuous-Conversion Modes
Analog Watchdog (AWD) Timer
1.55-µs Minimum Sample and Conversion
Enhanced Real-Time Interrupt (RTI)
Time
Interrupt Expansion Module (IEM)
Calibration Mode and Self-Test Features
System Integrity and Failure Detection
Flexible Interrupt Handling
ICE Breaker
Expansion Bus Module (EBM)
Direct Memory Access (DMA) Controller
Supports 8- and 16-Bit Expansion Bus
32 Control Packets and 16 Channels
Memory Interface Mappings
Zero-Pin Phase-Locked Loop (ZPLL)-Based
42 I/O Expansion Bus Pins
Clock Module With Prescaler
46 Dedicated General-Purpose I/O (GIO) Pins
Multiply-by-4 or -8 Internal ZPLL Option
and 47 Additional Peripheral I/Os
ZPLL Bypass Mode
Sixteen External Interrupts
Twelve Communication Interfaces:
On-Chip Scan-Base Emulation Logic, IEEE
Standard 1149.1 (1) (JTAG) Test-Access Port
Two Serial Peripheral Interfaces (SPIs)
Available in KGD, HFQ, HKP and PGE
255 Programmable Baud Rates
Packages
Three Serial Communication Interfaces
(SCIs)
224 Selectable Baud Rates
Asynchronous/Isosynchronous Modes
(1)
The test-access port is compatible with the IEEE Standard
1149.1-1990, IEEE Standard Test-Access Port and Boundary
Scan Architecture specification. Boundary scan is not
supported on this device.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
ARM7TDMI is a trademark of Advanced RISC Machines Limited (ARM).
PRODUCTION DATA information is current as of publication date.
Copyright © 2009–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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