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74AC11112 Scheda tecnica(PDF) 4 Page - Texas Instruments

Il numero della parte 74AC11112
Spiegazioni elettronici  DUAL J-K NEGATIVE-EDGE-TRIGGERED ELIP-FLOPS WITH CLEAR AND PRESET
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

74AC11112 Scheda tecnica(HTML) 4 Page - Texas Instruments

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54AC11112, 74AC11112
DUAL JK NEGATIVEEDGETRIGGERED FLIPFLOPS
WITH CLEAR AND PRESET
SCAS073A − JUNE 1989 − REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
2−4
timing requirements, VCC = 3.3 V ± 0.3 V (see Figure 1)
TA = 25°C
54AC11112
74AC11112
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
0
100
0
70
0
70
MHz
tw
Pulse duration
PRE or CLR low
5
5
5
ns
tw
Pulse duration
CLK low or CLK high
5
5
5
ns
tsu
Setup time before CLK
Data high or low
5
5
5
ns
tsu
Setup time before CLK
PRE or CLR inactive
2.5
2.5
2.5
ns
th
Hold time after CLK
0.5
0.5
0.5
ns
timing requirements, VCC = 5 V ± 0.5 V (see Figure 1)
TA = 25°C
54AC11112
74AC11112
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
0
125
0
125
0
125
MHz
tw
Pulse duration
PRE or CLR low
4
4
4
ns
tw
Pulse duration
CLK low or CLK high
4
4
4
ns
tsu
Setup time before CLK
Data high or low
3.5
3.5
3.5
ns
tsu
Setup time before CLK
PRE or CLR inactive
2
2
2
ns
th
Hold time after CLK
1
1
1
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25°C
54AC11112
74AC11112
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
fmax
100
150
100
100
MHz
tPLH
PRE or CLR
Q or Q
1.5
4.9
6.7
1.5
7.6
1.5
7.3
ns
tPHL
PRE or CLR
Q or Q
1.5
7
9.2
1.5
10.3
1.5
9.9
ns
tPLH
CLK
Q or Q
1.5
5.4
7.1
1.5
7.9
1.5
7.6
ns
tPHL
CLK
Q or Q
1.5
6
7.9
1.5
9
1.5
8.5
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25°C
54AC11112
74AC11112
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
fmax
125
175
125
125
MHz
tPLH
PRE or CLR
Q or Q
1.5
3.3
5.1
1.5
5.6
1.5
5.4
ns
tPHL
PRE or CLR
Q or Q
1.5
4.6
6.7
1.5
7.7
1.5
7.3
ns
tPLH
CLK
Q or Q
1.5
3.4
5.1
1.5
5.8
1.5
5.6
ns
tPHL
CLK
Q or Q
1.5
4.2
6.3
1.5
7.4
1.5
7
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per gate
CL = 50 pF,
f = 1 MHz
37
pF


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