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TMP006BIYZFR Scheda tecnica(PDF) 7 Page - Texas Instruments

Il numero della parte TMP006BIYZFR
Spiegazioni elettronici  Infrared Thermopile Sensor in Chip-Scale Package
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Pointer
Register
Result
Registers
Configuration
Registers
I/O
Control
Interface
SCL
SDA
DRDY
ADR1
ADR0
TMP006
TMP006B
www.ti.com
SBOS518C – MAY 2011 – REVISED DECEMBER 2012
The TMP006 and TMP006B initially start up with typical settings consisting of a conversion rate of one
conversion per second (as specified in the Electrical Characteristics). The internal structure of the digital interface
is shown in Figure 5.
Figure 5. Internal Structure
SERIAL BUS ADDRESS
To communicate with the TMP006 or TMP006B, the master must first address slave devices via a slave address
byte. The slave address byte consists of seven address bits and a direction bit that indicates the intent to
execute a read or write operation.
The TMP006 and TMP006B feature two address pins to allow up to eight devices to be addressed on a single
bus. Table 1 describes the pin logic levels used to properly connect up to eight devices. The state of the ADR0
and ADR1 pins is sampled on every bus communication and should be set before any activity on the interface
occurs. The address pin is read at the start of each communication event.
Table 1. TMP006 and TMP006B Address Pins and Slave Addresses
ADR1
ADR0
SMBus Address
0
0
1000000
0
1
1000001
0
SDA
1000010
0
SCL
1000011
1
0
1000100
1
1
1000101
1
SDA
1000110
1
SCL
1000111
Copyright © 2011–2012, Texas Instruments Incorporated
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