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AD9887AKS-100 Scheda tecnica(PDF) 2 Page - Analog Devices

Il numero della parte AD9887AKS-100
Spiegazioni elettronici  Dual Interface for Flat Panel Display
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
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AD9887A
Rev. B | Page 2 of 52
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Analog Interface ........................................................................... 3
Digital Interface ............................................................................ 5
Absolute Maximum Ratings............................................................ 7
Explanation of Test Levels ........................................................... 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Pin Function Details—Pins Shared Between Digital and
Analog Interfaces........................................................................ 11
Pin Function Details—Analog Interface ................................. 13
Pin Function Details—Digital Interface.................................. 16
Theory of Operation and Design Guide—Analog Interface .... 17
General Description................................................................... 17
Input Signal Handling................................................................ 17
HSYNC and VSYNC Inputs...................................................... 17
Clamping ..................................................................................... 17
Gain and Offset Control ............................................................ 18
Sync-on-Green Input ................................................................. 19
Clock Generation ....................................................................... 19
Alternate Pixel Sampling Mode ................................................ 22
Timing—Analog Interface ........................................................ 23
Theory of Operation—Interface Detection ................................ 27
Active Interface Detection and Selection ................................ 27
Hot-Plug Detect.......................................................................... 27
Power Management ................................................................... 27
Scan Function ............................................................................. 28
Theory of Operation—Digital Interface...................................... 29
Capturing Encoded Data........................................................... 29
Data Frames ................................................................................ 29
Special Characters ...................................................................... 29
Channel Resynchronization...................................................... 29
Data Decoder .............................................................................. 29
HDCP .......................................................................................... 29
General Timing Diagrams—Digital Interface............................ 31
Timing Mode Diagrams—Digital Interface ........................... 31
2-Wire Serial Register Map ........................................................... 32
2-Wire Serial Control Register Details.................................... 35
Theory of Operation—Sync Processing ...................................... 48
Sync Stripper ............................................................................... 48
Sync Separator ............................................................................ 48
PCB Layout Recommendations.................................................... 49
Analog Interface Inputs ............................................................. 49
Digital Interface Inputs.............................................................. 49
Power Supply Bypassing ............................................................ 49
PLL ............................................................................................... 50
Outputs—Both Data and Clocks.............................................. 50
Digital Inputs .............................................................................. 50
Voltage Reference ....................................................................... 50
Outline Dimensions ....................................................................... 51
Ordering Guide .......................................................................... 51
REVISION HISTORY
3/07—Rev. A to Rev. B
Changes to Figure 1.......................................................................... 1
Changes to Figure 28...................................................................... 27
Changes to Figure 37 and Figure 40............................................. 31
12/05—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Added Pb-Free Package .....................................................Universal
Changes to Figure 1.......................................................................... 1
Changes to Specifications ................................................................ 4
Changes to Table 4.......................................................................... 10
Deleted Analog Interface Pin List Table ...................................... 11
Added Figure 3................................................................................ 18
Added TV Section in Table 7........................................................ 22
Deleted Digital Interface Pin List Table....................................... 24
Changes to Theory of Operation
(Interface Detection) Section........................................................ 28
Added Hot-Plug Detect Section ................................................... 28
Changes to Table 8.......................................................................... 29
Changes to Figure 32...................................................................... 32
Changes to Control Bits Section................................................... 44
Change to Figure 42 ....................................................................... 48
Updated Outline Dimensions....................................................... 53
Changes to Ordering Guide .......................................................... 53
5/03—Revision 0: Initial Version


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