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P-TQFP-100-3 Scheda tecnica(PDF) 5 Page - Infineon Technologies AG

Il numero della parte P-TQFP-100-3
Spiegazioni elettronici  2 Channel Serial Optimized Communication Controller for HDLC/PPP
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Produttore elettronici  INFINEON [Infineon Technologies AG]
Homepage  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

P-TQFP-100-3 Scheda tecnica(HTML) 5 Page - Infineon Technologies AG

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PEB 20525
PEF 20525
Table of Contents
Page
Data Sheet
5
2000-09-14
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1.1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.2
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
1.3
Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1.3.1
System Integration Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1.3.2
Serial Configuration Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
1.4
Differences between SEROCCO-H and the HSCX/ESCC Family . . . . . . 25
1.4.1
Enhancements to the HSCX Serial Core . . . . . . . . . . . . . . . . . . . . . . . . 25
1.4.2
Simplifications to the HSCX Serial Core . . . . . . . . . . . . . . . . . . . . . . . . 25
2
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.1
Pin Diagram P-LFBGA-80-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.2
Pin Diagram P-TQFP-100-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.3
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.2
Serial Communication Controller (SCC) . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.2.1
Protocol Modes Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.2.2
SCC FIFOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.2.2.1
SCC Transmit FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.2.2.2
SCC Receive FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.2.2.3
SCC FIFO Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.2.3
Clocking System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.2.3.1
Clock Mode 0 (0a/0b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.2.3.2
Clock Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3.2.3.3
Clock Mode 2 (2a/2b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.2.3.4
Clock Mode 3 (3a/3b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.2.3.5
Clock Mode 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.2.3.6
Clock Mode 5a (Time Slot Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
3.2.3.7
Clock Mode 5b (Octet Sync Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.2.3.8
Clock Mode 6 (6a/6b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.2.3.9
Clock Mode 7 (7a/7b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.2.4
Baud Rate Generator (BRG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.2.5
Clock Recovery (DPLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.2.6
SCC Timer Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
3.2.7
SCC Serial Bus Configuration Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.2.8
Serial Bus Access Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.2.9
Serial Bus Collisions and Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.2.10
Serial Bus Access Priority Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.2.11
Serial Bus Configuration Timing Modes . . . . . . . . . . . . . . . . . . . . . . . . 74
3.2.12
Functions Of Signal RTS in HDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . 74
3.2.13
Data Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74


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