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FDG326P Scheda tecnica(PDF) 4 Page - Texas Instruments

Il numero della parte FDG326P
Spiegazioni elettronici  Triple-Supply Power Management IC for Powering FPGAs and DSPs
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

FDG326P Scheda tecnica(HTML) 4 Page - Texas Instruments

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TPS75003-EP
SGLS311A
– DECEMBER 2006 – REVISED MARCH 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
VEN1 = VIN1, VEN2 = VIN2, VEN3 = VIN3, VIN1 = VIN2 = 2.2 V, VIN3 = 3 V, VOUT3 = 2.5V, COUT1 = COUT2 = 47 μF, COUT3 = 2.2 μF,
TA = -55°C to 125°C, unless otherwise noted. Typical values are at TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Supply and Logic
Input voltage range (IN1, IN2,
VINX
2.2
6.5
V
IN3)(1)
Quiescent current, IQ = IDGND +
IQ
IOUT1 = IOUT2 = IOUT3= 0 mA
75
150
μA
IAGND
ISHDN
Shutdown supply current
VEN1 = VEN2 = VEN3 = 0 V
0.05
3
μA
TA = 25°C
1.4
Enable high, enabled
VIH1, 2
V
(EN1, EN2)
TA = Full Range
1.45
TA = 25°C
1.14
VIH3
Enable High, enabled (EN3)
V
TA = Full Range
1.2
Enable low, shutdown
VILX
0
0.3
V
(EN1, EN2, EN3)
Enable pin current (EN1, EN2,
IENX
0.01
0.5
μA
EN3)
Buck Controllers 1 and 2
VOUT1,2
Adjustable output voltage Range(2)
VFBX
VINX
V
VFB1,2
Feedback voltage (FB1, FB2)
1.22
V
Feedback voltage accuracy(1)
±2%
(FB1, FB2)
IFB1,2
Current into FB1, FB2 pins
0.01
0.5
μA
TA = 25°C
80
120
Reference voltage for current
VIS1,2
100
mV
sense
TA = Full Range
75
125
IIS1,2
Current into IS1, IS2 pins
0.01
0.5
μA
Measured with the circuit in Figure 2,
ΔVOUT%/ΔVIN
Line regulation(1)
0.1
% / V
VOUT + 0.5 V ≤ VIN ≤ 6.5 V
Measured with the circuit in Figure 2,
ΔVOUT%/ΔIOUT
Load regulation
0.6
% / A
30 mA
≤ I OUT ≤ 2 A
Measured with the circuit in Figure 2,
n 1,2
Efficiency(3)
94%
IOUT = 1 A
Measured with the circuit in Figure 2,
tSTR1,2
Startup time(3)
RL = 6 Ω, COUT = 100 μF, CSS = 2.2
5
ms
nF
VIN1,2 > 2.5 V
4
Gate driver P-Channel and
RDS,ON1,2
N-Channel MOSFET on-resistance V
IN1,2 = 2.2 V
6
Gate Driver P-Channel and
ISW1,2
100
mA
N-Channel MOSFET drive current
tON
Minimum on time
1.36
1.55
1.84
μs
tOFF
Minimum off time
0.44
0.65
0.86
μs
(1)
To be in regulation, minimum VIN1 (or VIN2) must be greater than VOUT1,NOM (or VOUT2,NOM) by an amount determined by external
components. Minimum VIN3 = VOUT3 + VDO or 2.2 V, whichever is greater.
(2)
Maximum VOUT is dependent on external components and will be less than VIN. Parameter is not production tested.
(3)
Depends on external components.
4
Copyright
© 2006–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS75003-EP


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