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ML4819CP Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor |
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ML4819CP Scheda tecnica(HTML) 1 Page - Fairchild Semiconductor |
1 / 15 page + – RT ISENSE B ISENSE A INV A OVP EA OUT A – – ISINE RAMP COMP CT ERROR AMP + 5V IEA IMULT OSC SLOPE COMPENSATION UNDER VOLTAGE LOCKOUT S R Q S R Q DUTY CYCLE ILIM PWM B OUT B PGND B PGND A VREF VCC VCC VCC GND OUT A GM OUT 5V 5V 0.7V 1V 10 20 12 7 11 9 8 14 18 17 16 15 13 1 3 2 5 4 6 19 GAIN MODULATOR PWM CONTROLLER POWER FACTOR CONTROLLER + – May 1997 ML4819 Power Factor and PWM Controller “Combo” GENERAL DESCRIPTION The ML4819 is a complete boost mode Power factor Controller (PFC) which also contains a PWM controller. The PFC circuit is similar to the ML4812 while the PWM controller can be used for current or voltage mode control for a second stage converter. Since the PWM and PFC circuits share the same oscillator, synchronization of the two stages is inherent. The outputs of the controller IC provide high current (>1A peak) and high slew rate to quickly charge and discharge MOSFET gates. Special care has been taken in the design of the ML4819 to increase system noise immunity. The PFC section is of the peak current sensing boost type, using a current sense transformer or current sensing MOSFETs to non-dissipatively sense switch current. This gives the system overall efficiency over average current sensing control method. The PWM section includes cycle by cycle current limiting, precise duty cycle limiting for single ended converters, and slope compensation. BLOCK DIAGRAM FEATURES s Two 1A peak current totem-pole output drivers s Precision buffered 5V reference ( ±1%) s Large oscillator amplitude for better noise immunity s Precision duty cycle limit for PWM section s Current input gain modulator improves noise immunity s Programmable Ramp Compensation circuit s Over-Voltage comparator helps prevent output “runaway” s Wide common mode range in current sense compensators for better noise immunity s Under-Voltage Lockout circuit with 6V hysteresis REV. 1.0 10/10/2000 |
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