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ADF7020BCPZ-RL Scheda tecnica(PDF) 8 Page - Analog Devices

Il numero della parte ADF7020BCPZ-RL
Spiegazioni elettronici  High Performance, ISM Band, FSK/ASK Transceiver IC
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
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ADF7020BCPZ-RL Scheda tecnica(HTML) 8 Page - Analog Devices

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ADF7020
Data Sheet
Rev. D | Page 8 of 48
TIMING CHARACTERISTICS
VDD = 3 V ± 10%, VGND = 0 V, TA = 25°C, unless otherwise noted. Guaranteed by design, not production tested.
Table 2.
Parameter
Limit at TMIN to TMAX
Unit
Test Conditions/Comments
t1
>10
ns
SDATA to SCLK setup time
t2
>10
ns
SDATA to SCLK hold time
t3
>25
ns
SCLK high duration
t4
>25
ns
SCLK low duration
t5
>10
ns
SCLK to SLE setup time
t6
>20
ns
SLE pulse width
t8
<25
ns
SCLK to SREAD data valid, readback
t9
<25
ns
SREAD hold time after SCLK, readback
t10
>10
ns
SCLK to SLE disable time, readback
TIMING DIAGRAMS
SCLK
SLE
DB31 (MSB)
DB30
DB2
DB1
(CONTROL BIT C2)
SDATA
DB0 (LSB)
(CONTROL BIT C1)
t6
t1
t2
t3
t4
t5
Figure 2. Serial Interface Timing Diagram
t8
t3
t1
t2
t10
t9
X
RV16
RV15
RV2
RV1
SCLK
SDATA
SLE
SREAD
(CONTROL BIT C1)
R7_DB0
Figure 3. Readback Timing Diagram


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