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FQD3P20 Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor |
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FQD3P20 Scheda tecnica(HTML) 1 Page - Fairchild Semiconductor |
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1 / 9 page  ©2000 Fairchild Semiconductor International April 2000 Rev. A, April 2000 QFET QFET QFET QFETTM FQD3P20 / FQU3P20 200V P-Channel MOSFET General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters. Features • -2.4A, -200V, RDS(on) = 2.7Ω @VGS = -10 V • Low gate charge ( typical 6.0 nC) • Low Crss ( typical 7.5 pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability Absolute Maximum Ratings T C = 25°C unless otherwise noted Thermal Characteristics Symbol Parameter FQD3P20 / FQU3P20 Units VDSS Drain-Source Voltage -200 V ID Drain Current - Continuous (TC = 25°C) -2.4 A - Continuous (TC = 100°C) -1.52 A IDM Drain Current - Pulsed (Note 1) -9.6 A VGSS Gate-Source Voltage ±30 V EAS Single Pulsed Avalanche Energy (Note 2) 150 mJ IAR Avalanche Current (Note 1) -2.4 A EAR Repetitive Avalanche Energy (Note 1) 3.7 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) -5.5 V/ns PD Power Dissipation (TA = 25°C) * 2.5 W Power Dissipation (TC = 25°C) 37 W - Derate above 25°C 0.29 W/°C TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C TL Maximum lead temperature for soldering purposes, 1/8 from case for 5 seconds 300 °C Symbol Parameter Typ Max Units RθJC Thermal Resistance, Junction-to-Case -- 3.4 °C W RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C W RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C W * When mounted on the minimum pad size recommended (PCB Mount) I-PAK FQU Series D-PAK FQD Series G S D G S D ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! S D G |
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