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FDG6324L Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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FDG6324L Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 7 page Electrical Characteristics (T A = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS I FL Forward Leakage Current V IN = 20 V, VON/OFF = 0 V 1 µA ON CHARACTERISTICS (Note 3) V DROP Conduction Voltage Drop V IN = 12 V, VON/OFF = 3.3 V, IL = 0.36 A 0.14 0.2 V V IN = 5 V, VON/OFF = 3.3 V, IL = 0.27 A 0.16 0.2 R (ON) Q 2 - Static On-Resistance V GS = -12 V, ID = -0.6 A 0.37 0.55 Ω V GS = -5 V, ID = -0.5 A 0.58 0.75 I L Load Current V DROP = 0.2 V, VIN = 12 V, VON/OFF = 3.3 V 0.36 A V DROP = 0.2 V, VIN = 5 V, VON/OFF = 3.3 V 0.27 Notes: 1. Range of V in can be up to 25V, but R1 and R2 must be scaled such that VGS of Q2 does not exceed -20V. 2. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Thermal ratings based on minimum mounting pad. 3. Pulse Test: Pulse Width < 300µs, Duty Cycle< 2.0% FDG6324L Load Switch Application External Component Recommendation For Co ≤ 1uF applications: R1 is required to turn Q2 off. R2 and C1 are optional for slew rate control. First select R2, 100 -1K Ω, for slew rate control. Then select R1 such that the ratio R1/R2 is maintained between 10-100. SPICE model (FDG6324L.MOD) available at www.fairchildsemi.com. FDG6324L Rev.D APPLICATION CIRCUIT IN OUT C1 LOAD Q2 R1 R2 ON/OFF Q1 Co |
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Descrizione simile - FDG6324L |
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