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DM74S182N Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor

Il numero della parte DM74S182N
Spiegazioni elettronici  Look-Ahead Carry Generator
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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© 2000 Fairchild Semiconductor Corporation
DS006474
www.fairchildsemi.com
August 1986
Revised March 2000
DM74S182
Look-Ahead Carry Generator
General Description
These circuits are high-speed, look-ahead carry genera-
tors, capable of anticipating a carry across four binary
adders or groups of adders. They are cascadable to per-
form full look-ahead across n-bit adders. Carry, generate-
carry, and propagate-carry functions are provided as
shown in the pin designation table.
When used in conjunction with the 181 arithmetic logic unit,
these generators provide high-speed carry look-ahead
capability for any word length. Each DM74S182 generates
the look-ahead (anticipated carry) across a group of four
ALU’s and, in addition, other carry look-ahead circuits may
be employed to anticipate carry across sections of four
look-ahead packages up to n-bits. The method of cascad-
ing circuits to perform multi-level look-ahead is illustrated
under typical application data.
Carry input and output of the ALU’s are in their true form,
and the carry propagate (P) and carry generate (G) are in
negated form; therefore, the carry functions (inputs, out-
puts, generate, and propagate) of the look-ahead genera-
tors are implemented in the compatible forms for direct
connection to the ALU. Reinterpretations of carry functions,
as explained on the 181 data sheet are also applicable to
and compatible with the look-ahead generator. Positive
logic equations for the DM74S182 are:
Cn + x = G0 + P0 Cn
Cn + y = G1 + P1 G0 + P1 P0 Cn
Cn + z = G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 Cn
G
= G3 (P3 + G2) (P3 + P2 + G1)
(P3
+ P2 + P1 + G0)
P
= P3 P2 P1 P0
Features
s Typical propagation delay time 7 ns
s Typical power dissipation 260 mW
Ordering Code:
Connection Diagram
Pin Designations
Order Number
Package Number
Package Description
DM74S182N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Designation
Pin Nos.
Function
G0, G1, G2, G3
3, 1, 14, 5
Active LOW
Carry Generate Inputs
P0, P1, P2, P3
4, 2, 15, 6
Active LOW
Carry Propagate Inputs
Cn
13
Carry Input
Cn + x, Cn + y,
12, 11, 9
Carry Outputs
Cn + z
G
10
Active LOW
Carry Generate Output
P
7
Active LOW
Carry Propagate Output
VCC
16
Supply Voltage
GND
8
Ground


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