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AZV832 Scheda tecnica(PDF) 9 Page - BCD Semiconductor Manufacturing Limited |
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AZV832 Scheda tecnica(HTML) 9 Page - BCD Semiconductor Manufacturing Limited |
9 / 27 page Preliminary Datasheet Single/Dual Low Bias Current, Low Voltage, Rail-to-Rail Input/Output CMOS Operational Amplifiers Jul. 2012 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 9 AZV831/2 5.0V DC Electrical Characteristics VCC=5.0V, VEE=0, VOUT=VCC/2, VCM=VCC/2, TA=25°C, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit Input Offset Voltage VOS 0.5 2.5 mV Input Bias Current IB 1.0 pA Input Offset Current IOS 1.0 pA Input Common-mode Voltage Range VCM -0.3 5.3 V Common-mode Rejection Ratio CMRR VCM=-0.3V to 3.8V 70 85 dB VCM=-0.3V to 5.3V 65 90 Large Signal Voltage Gain GV RL=1kΩ to VCC/2, VOUT=0.2V to 4.8V 80 92 dB RL=10kΩ to VCC/2, VOUT=0.05V to 4.95V 85 98 Input Offset Voltage Drift ∆VOS/∆T 2.0 µV/ °C Output Voltage Swing from Rail VOL/VOH RL=1kΩ to VCC/2 25 50 mV RL=10kΩ to VCC/2 4 15 Output Current Sink ISINK VOUT=VCC 100 150 mA Source ISOURCE VOUT=0V 110 185 Closed-loop Output Impedance f=1kHz, AV=1 9 Ω Power Supply Rejection Ratio PSRR VCC=1.6V to 5.0V 66 80 dB Supply Current (Per Amplifier) ICC VOUT=VCC/2, IOUT=0 70 90 µA 5V AC Electrical Characteristics VCC=5.0V, VEE=0, VOUT=VCC/2, VCM=VCC/2, TA=25°C, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit Gain Bandwidth Product GBP RL=100kΩ 1.0 MHz Slew Rate (Note 2) SR 2V Step, CL=100pF, RL=10kΩ 0.45 V/µs Phase Margin φM RL=100kΩ 67 Degrees THD+N THD+N f=1kHz, AV=1, VIN=1VPP RL=10kΩ,CL=100pF -70 dB Voltage Noise Density en f=1kHz 27 Hz nV/ Note 2: Number specified is the positive slew rate. |
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