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74FR240SC Scheda tecnica(PDF) 3 Page - Fairchild Semiconductor |
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74FR240SC Scheda tecnica(HTML) 3 Page - Fairchild Semiconductor |
3 / 5 page 3 www.fairchildsemi.com AC Electrical Characteristics Extended AC Electrical Characteristics Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc. Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi- cation applies to any outputs switching HIGH-to-LOW, (tOSHL), LOW-to-HIGH, (tOSLH), or HIGH-to-LOW and/or LOW-to-HIGH, (tOST). Specifications guaran- teed with all outputs switching in phase. Symbol Parameter TA = +25°CTA = 0°C to +70°C Units VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max tPLH Propagation Delay 1.0 3.3 4.7 1.0 4.7 ns tPHL An to Bn or Bn to An 1.02.9 4.71.0 4.7 tPZH Output Enable Time 2.6 4.0 7.0 2.6 7.0 ns tPZL 2.66.3 7.02.6 7.0 tPHZ Output Disable Time 1.7 3.3 6.6 1.7 6.6 ns tPLZ 1.72.9 6.61.7 6.6 Symbol Parameter TA = 0°C to +70°CTA = 0°C to +70°C Units VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 250 pF Eight Outputs Switching (Note 4) (Note 3) Min Max Min Max tPLH Propagation Delay 1.0 6.4 2.3 8.3 ns tPHL An to Bn or Bn to An 1.0 6.4 2.3 8.3 tPZH Output Enable Time 2.6 7.2 ns tPZL 2.6 7.2 tPHZ Output Disable Time 1.7 6.8 ns tPLZ 1.7 6.8 tOSHL Pin-to-Pin Skew 2.0 ns (Note 5) for HL Transitions tOSLH Pin-to-Pin Skew 1.1 ns (Note 5) for LH Transitions tOST Pin-to-Pin Skew 3.1 ns (Note 5) for HL/LH Transitions |
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Descrizione simile - 74FR240SC |
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