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74F138SJ Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor |
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74F138SJ Scheda tecnica(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 2000 Fairchild Semiconductor Corporation DS009478 www.fairchildsemi.com April 1988 Revised September 2000 74F138 1-of-8 Decoder/Demultiplexer General Description The F138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three F138 devices or a 1-of-32 decoder using four F138 devices and one inverter. Features s Demultiplexing capability s Multiple input enable for easy expansion s Active LOW mutually exclusive outputs Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Order Number Package Number Package Description 74F138SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F138PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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