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DAC104S085CISD Scheda tecnica(PDF) 6 Page - Texas Instruments |
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DAC104S085CISD Scheda tecnica(HTML) 6 Page - Texas Instruments |
6 / 29 page DAC104S085 SNAS362E – MAY 2006 – REVISED OCTOBER 2012 www.ti.com Electrical Characteristics (continued) The following specifications apply for VA = +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 12 to 1011. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified. Units Symbol Parameter Conditions Typical(1) Limits(1) (Limits) VA = 2.7V 350 485 µA (max) to 3.6V fSCLK = 30 MHz VA = 4.5V 500 650 µA (max) to 5.5V Normal Supply Current (output IN unloaded) VA = 2.7V 330 µA to 3.6V fSCLK = 0 VA = 4.5V 460 µA to 5.5V VA = 2.7V 0.10 1.0 µA (max) Power Down Supply Current to 3.6V IPD (output unloaded, SYNC = DIN = All PD Modes,(2) VA = 4.5V 0V after PD mode loaded) 0.15 1.0 µA (max) to 5.5V VA = 2.7V 1.1 1.7 mW (max) to 3.6V fSCLK = 30 MHz VA = 4.5V 2.5 3.6 mW (max) to 5.5V Normal Supply Power (output PN unloaded) VA = 2.7V 1.0 mW to 3.6V fSCLK = 0 VA = 4.5V 2.3 mW to 5.5V VA = 2.7V 0.3 3.6 µW (max) Power Down Supply Power (output to 3.6V PPD unloaded, SYNC = DIN = 0V after All PD Modes,(2) VA = 4.5V PD mode loaded) 0.8 5.5 µW (max) to 5.5V A.C. and Timing Characteristics Values shown in this table are design targets and are subject to change before product release. The following specifications apply for VA = +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 12 to 1011. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified. Units Symbol Parameter Conductions Typical(1) Limits(1) (Limits) fSCLK SCLK Frequency 40 30 MHz (max) 100h to 300h code change ts Output Voltage Settling Time(2) 4.5 6 µs (max) RL = 2 kΩ, CL = 200 pF SR Output Slew Rate 1 V/µs Glitch Impulse Code change from 200h to 1FFh 12 nV-sec Digital Feedthrough 0.5 nV-sec Digital Crosstalk 1 nV-sec DAC-to-DAC Crosstalk 3 nV-sec Multiplying Bandwidth VREFIN = 2.5V ± 0.1Vpp 160 kHz VREFIN = 2.5V ± 0.1Vpp Total Harmonic Distortion 70 dB input frequency = 10kHz VA = 3V 6 µsec tWU Wake-Up Time VA = 5V 39 µsec 1/fSCLK SCLK Cycle Time 25 33 ns (min) tCH SCLK High time 7 10 ns (min) (1) Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average Outgoing Quality Level). (2) This parameter is guaranteed by design and/or characterization and is not tested in production. 6 Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: DAC104S085 |
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