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AD8012AR Scheda tecnica(PDF) 11 Page - Analog Devices |
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AD8012AR Scheda tecnica(HTML) 11 Page - Analog Devices |
11 / 15 page AD8012 –11– REV. A THEORY OF OPERATION The AD8012 is a dual high speed CF amplifier that attains new levels of bandwidth (BW), power, distortion and signal swing capability. Its wide dynamic performance (including noise) is the result of both a new complementary high speed bipolar process and a new and unique architectural design. The AD8012 basically uses a two gain stage complementary design approach versus the traditional “single stage” complementary mirror structure sometimes referred to as the Nelson amplifier. Though twin stages have been tried before, they typically consumed high power since they were of a folded cascade design much like the AD9617. This design allows for the standing or quiescent current to add to the high signal or slew current-induced stages. In the time domain, the large signal output rise/fall time and slew rate is typically controlled by the small signal BW of the amplifier and the input signal step amplitude respectively, not the dc quiescent current of the gain stages (with the exception of input level shift diodes Q1/Q2). Using two stages vs. one also allows for a higher overall gain bandwidth product (GBWP) for the same power, thus lower signal distortion and the ability to drive heavier external loads. In addition, the second gain stage also isolates (divides down) A3’s input reflected load drive and the nonlinearities created resulting in relatively lower dis- tortion and higher open-loop gain. Overall, when “high” external load drive and low ac distortion is a requirement, a twin gain stage integrating amplifier like the AD8012 will provide excellent results for lower power over the traditional single stage complementary devices. In addition, being a CF amplifier, closed-loop BW variations versus exter- nal gain variations (varying RN) will be much lower compared to a VF op amp, where the BW varies inversely with gain. An- other key attribute of this amplifier is its ability to run on a single 5 V supply due in part to its wide common-mode input and output voltage range capability. For 5 V supply operation, the device obviously consumes half the quiescent power (vs. 10 V supply) with little degradation in its ac and dc perfor- mance characteristics. See data sheet comparisons. DC GAIN CHARACTERISTICS Gain stages A1/A1B and A2/A2B combined provide negative feedforward transresistance gain. See Figure 40. Stage A3 is a unity gain buffer which provides external load isolation to A2. Each stage uses a symmetrical complementary design. (A3 is also complementary though not explicitly shown). This is done to reduce both second order signal distortion and overall quies- cent power as discussed above. In the quasi dc to low frequency region, the closed loop gain relationship can be approximated as: G = 1+RF /RN noninverting operation G = –RF /RN inverting operation These basic relationships above are common to all traditional operational amplifiers. VP Q1 Q2 IPP IPN INP IPN VN A1 A1 ZI IQ1 Q3 Q4 IE CP1 CP1 Z2 A2 CL RN ICQ – IO RF VO CD ICQ + IO VO IQ1 AD8012 A2 CP2 Z1 = R1 || C1 Z1 CD A3 RL Z1 –VI –VI IR – IFC IR + IFC +– Figure 40. Simplified Block Diagram |
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