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AD5532ABC-3 Scheda tecnica(PDF) 11 Page - Analog Devices |
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AD5532ABC-3 Scheda tecnica(HTML) 11 Page - Analog Devices |
11 / 16 page AD5533 –11– REV. 0 FUNCTIONAL DESCRIPTION The AD5533 can be thought of as consisting of an ADC and 32 DACs in a single package. The input voltage VIN is sampled and converted into a digital word. The digital result is loaded into one of the DAC registers and is converted (with gain and offset) into an analog output voltage (VOUT0–VOUT31). Since the channel output voltage is effectively the output of a DAC there is no droop associated with it. As long as power to the device is maintained, the output voltage will remain constant until this channel is addressed again. To update a single channel’s output voltage, the required new voltage level is set up on the common input pin, VIN. The desired channel is then addressed via the parallel port or the serial port. When the channel address has been loaded, provided TRACK is high, the circuit begins to acquire the correct code to load to the DAC in order that the DAC output matches the voltage on VIN. The BUSY pin goes low and remains so until the acquisition is complete. The noninverting input to the output buffer is tied to VIN during the acquisition period to avoid spurious outputs while the DAC acquires the correct code. The acquisition is completed in 16 µs max. The BUSY pin goes high and the updated DAC output assumes control of the output voltage. The output voltage of the DAC is connected to the noninverting input of the output buffer. The held voltage will remain on the output pin indefinitely, without drooping, as long as power to the device is maintained. On power-on, all the DACs, including the offset channel, are loaded with zeros. The outputs of the DACs are at 50 mV typical (negative full-scale). If the OFFS_IN pin is driven by the on-board offset channel, the outputs VOUT0 to VOUT31 are also at 50 mV on power-on since OFFS_IN = 50 mV (VOUT = 3.5 2 × V DAC – 3.52 × VOFFS_IN = 176 mV – 126 mV = 50 mV). Analog Input The equivalent analog input circuit is shown in Figure 11. The Capacitor C1 is typically 20 pF and can be attributed to pin capacitance and 32 off-channels. When a channel is selected, an extra 7.5 pF (typ) is switched in. This Capacitor C2 is charged to the previously acquired voltage on that particular channel so it must charge/discharge to the new level. It is essential that the external source can charge/discharge this additional capaci- tance within 1 µs–2 µs of channel selection so that V IN can be acquired accurately. For this reason a low impedance source is recommended. C1 20pF VIN C2 7.5pF ADDRESSED CHANNEL Figure 11. Analog Input Circuit Large source impedances will significantly affect the performance of the ADC. This may necessitate the use of an input buffer amplifier. Output Buffer Stage—Gain and Offset The function of the output buffer stage is to translate the 0 V–3 V output of the DAC to a wider range. This is done by gaining up the DAC output by 3.52 and offsetting the voltage by the volt- age on OFFS_IN pin. VOUT = 3.52 × V DAC – 2.52 × V OFFS_IN VDAC is the output of the DAC. VOFFS_IN is the voltage at the OFFS_IN pin. Table I shows how the output range on VOUT relates to the offset voltage supplied by the user. Table I. Sample Output Voltage Ranges VOFFS_IN (V) VDAC (V) VOUT (V) 0.5 0 to 3 –1.26 to +9.3 1 0 to 3 –2.52 to +8.04 VOUT is limited only by the headroom of the output amplifiers. VOUT must be within maximum ratings. Offset Voltage Channel The offset voltage can be externally supplied by the user at OFFS_IN or it can be supplied by an additional offset voltage channel on the device itself. The required offset voltage is set up on VIN and acquired by the offset DAC. This offset channel’s DAC output is directly connected to OFFS_OUT. By connect- ing OFFS_OUT to OFFS_IN this offset voltage can be used as the offset voltage for the 32-output amplifiers. It is important to choose the offset so that VOUT is within maximum ratings. TRACK VIN DAC ACQUISITION CIRCUIT VOUT1 BUSY OUTPUT STAGE CONTROLLER THRESHOLD VOLTAGE PIN DRIVER DEVICE UNDER TEST ONLY ONE CHANNEL SHOWN FOR SIMPLICITY AD5533 Figure 12. Typical ATE Circuit Using TRACK Input |
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