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AD5554 Scheda tecnica(PDF) 4 Page - Analog Devices |
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AD5554 Scheda tecnica(HTML) 4 Page - Analog Devices |
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4 / 16 page  REV. 0 –4– AD5544/AD5554–SPECIFICATIONS AD5554 ELECTRICAL CHARACTERISTICS Parameter Symbol Condition Min Typ Max Unit STATIC PERFORMANCE 1 Resolution N 1 LSB = VREF/2 14 = 610 µV when VREF = 10 V 14 Bits Relative Accuracy INL ±1 LSB Differential Nonlinearity DNL ±1 LSB Output Leakage Current IOUTX Data = 0000H, TA = 25 °C10 nA IOUTX Data = 0000H, TA = TA Max 20 nA Full-Scale Gain Error GFSE Data = 3FFFH ±2 ±10 mV Full-Scale Tempco 2 TCVFS 1 ppm/ °C Feedback Resistor RFBXVDD = 5 V 4 6 8 k Ω REFERENCE INPUT VREFX Range VREFX –15 +15 V Input Resistance RREFX4 6 8 k Ω Input Resistance Match RREFX Channel-to-Channel 1 % Input Capacitance 2 CREFX5 pF ANALOG OUTPUT Output Current IOUTX Data = 3FFFH 1.25 2.5 mA Output Capacitance 2 COUTX Code-Dependent 80 pF LOGIC INPUTS AND OUTPUT Logic Input Low Voltage VIL 0.8 V Logic Input High Voltage VIH 2.4 V Input Leakage Current IIL 1 µA Input Capacitance 2 CIL 10 pF Logic Output Low Voltage VOL IOL = 1.6 mA 0.4 V Logic Output High Voltage VOH IOH = 100 µA4 V INTERFACE TIMING 2, 3 Clock Width High tCH 25 ns Clock Width Low tCL 25 ns CS to Clock Setup tCSS 0ns Clock to CS Hold tCSH 25 ns Clock to SDO Prop Delay tPD 220 ns Load DAC Pulsewidth tLDAC 25 ns Data Setup tDS 20 ns Data Hold tDH 20 ns Load Setup tLDS 5ns Load Hold tLDH 25 ns SUPPLY CHARACTERISTICS Power Supply Range VDD RANGE 4.5 5.5 V Positive Supply Current IDD Logic Inputs = 0 V 50 250 µA Negative Supply Current ISS Logic Inputs = 0 V, VSS = –5 V 0.001 1 µA Power Dissipation PDISS Logic Inputs = 0 V 1.25 mW Power Supply Sensitivity PSS ∆VDD = ±5% 0.006 %/% NOTES: 1All static performance tests (except I OUT) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The AD5554 RFB terminal is tied to the amplifier output. Typical values represent average readings measured at 25 °C. 2These parameters are guaranteed by design and not subject to production testing. 3All input control signals are specified with t R = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Specifications subject to change without notice. (@ VDD = 5 V 10%, VSS = 0 V, IOUTX = Virtual GND, AGNDX = 0 V, VREFA, B, C, D = 10 V, TA = full operating temperature range, unless otherwise noted.) |
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