Motore di ricerca datesheet componenti elettronici |
|
AD524CD Scheda tecnica(PDF) 9 Page - Analog Devices |
|
AD524CD Scheda tecnica(HTML) 9 Page - Analog Devices |
9 / 16 page AD524 REV. E –9– Voltage offset and drift comprise two components each; input and output offset and offset drift. Input offset is that component of offset that is directly proportional to gain i.e., input offset as measured at the output at G = 100 is 100 times greater than at G = 1. Output offset is independent of gain. At low gains, out- put offset drift is dominant, while at high gains input offset drift dominates. Therefore, the output offset voltage drift is normally specified as drift at G = 1 (where input effects are insignificant), while input offset voltage drift is given by drift specification at a high gain (where output offset effects are negligible). All input- related numbers are referred to the input (RTI) which is to say that the effect on the output is “G” times larger. Voltage offset vs. power supply is also specified at one or more gain settings and is also RTI. By separating these errors, one can evaluate the total error inde- pendent of the gain setting used. In a given gain configuration both errors can be combined to give a total error referred to the input (R.T.I.) or output (R.T.O.) by the following formula: Total Error R.T.I. = input error + (output error/gain) Total Error R.T.O. = (Gain × input error) + output error As an illustration, a typical AD524 might have a +250 µV out- put offset and a –50 µV input offset. In a unity gain configura- tion, the total output offset would be 200 µV or the sum of the two. At a gain of 100, the output offset would be –4.75 mV or: +250 µV + 100(–50 µV) = –4.75 mV. The AD524 provides for both input and output offset adjust- ment. This simplifies very high precision applications and mini- mize offset voltage changes in switched gain applications. In such applications the input offset is adjusted first at the highest programmed gain, then the output offset is adjusted at G = 1. GAIN The AD524 has internal high accuracy pretrimmed resistors for pin programmable gain of 1, 10, 100 and 1000. One of the preset gains can be selected by pin strapping the appropriate gain terminal and RG2 together (for G = 1 RG2 is not connected). –VS +VS AD524 G = 10 G = 100 G = 1000 VOUT OUTPUT SIGNAL COMMON INPUT OFFSET NULL 10k RG1 +INPUT –INPUT RG2 Figure 30. Operating Connections for G = 100 The AD524 can be configured for gains other than those that are internally preset; there are two methods to do this. The first method uses just an external resistor connected between pins 3 and 16, which programs the gain according to the formula RG = 40k G = –1 (see Figure 31). For best results RG should be a precision resistor with a low temperature coefficient. An external RG affects both gain accuracy and gain drift due to the mismatch between it and the internal thin-film resistors. Gain accuracy is determined by the tolerance of the external RG and the absolute accuracy of the internal resis- tors ( ±20%). Gain drift is determined by the mismatch of the temperature coefficient of RG and the temperature coefficient of the internal resistors (– 50 ppm/ °C typ). 40,000 2.105 G = +1 = 20 20% –VS +VS AD524 VOUT REFERENCE 1k RG1 +INPUT –INPUT RG2 2.105k 1.5k Figure 31. Operating Connections for G = 20 The second technique uses the internal resistors in parallel with an external resistor (Figure 32). This technique minimizes the gain adjustment range and reduces the effects of temperature coefficient sensitivity. 40,000 4000 ||4444.44 G = +1 = 20 17% G = 10 *R|G = 10 = 4444.44 *R|G = 100 = 404.04 *R|G = 1000 = 40.04 *NOMINAL ( 20%) –VS +VS AD524 VOUT REFERENCE RG1 +INPUT –INPUT RG2 4k Figure 32. Operating Connections for G = 20, Low Gain T.C. Technique The AD524 may also be configured to provide gain in the out- put stage. Figure 33 shows an H pad attenuator connected to the reference and sense lines of the AD524. R1, R2 and R3 should be made as low as possible to minimize the gain variation and reduction of CMRR. Varying R2 will precisely set the gain without affecting CMRR. CMRR is determined by the match of R1 and R3. RG2 G = 100 G = 1000 RG1 R2 5k R3 2.26k RL R1 2.26k G = (R2||40k ) + R1 + R3 (R2||40k ) (R1 + R2 + R3)||RL 2k G = 10 –VS +VS AD524 VOUT +INPUT –INPUT Figure 33. Gain of 2000 |
Codice articolo simile - AD524CD |
|
Descrizione simile - AD524CD |
|
|
Link URL |
Privacy Policy |
ALLDATASHEETIT.COM |
Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |