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LC786800E Scheda tecnica(PDF) 11 Page - Sanyo Semicon Device |
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LC786800E Scheda tecnica(HTML) 11 Page - Sanyo Semicon Device |
11 / 26 page LC786800E No.A2082-11/26 Continued from the previous page. Pin No. Pin name I/O State when "Reset" Function 84 GP06 I/O Input (L) General purpose I/O port with pull down resistor 85 GP07 I/O Input (L) General purpose I/O port with pull down resistor 86 GP14 I/O Input (L) General purpose I/O port with pull down resistor 87 TEST0 I Input Test input. This pin must be connected to the 0V level. 88 DVDD - - Digital system power supply 89 DVSS - - Digital system ground. This pin must be connected to the 0V level. 90 DVDD15 AO High Capacitor connection pin for internal regulator 91 JTRSTB I Input JTAG reset input (Connect to pull-down resistor or 0V level in normal mode.) 92 JTCK I Input JTAG clock input (Connect to pull-down resistor or 0V level in normal mode.) 93 JTDI I Input JTAG data input (Connect to pull-down resistor or 0V level in normal mode.) 94 JTMS I Input JTAG mode input (Connect to pull-down resistor or DVDD level in normal mode.) 95 JTDO O Low JTAG data output (Leave open in normal mode.) 96 JTRTCK O Low JTAG return clock output (Leave open in normal mode.) 97 TEST1 I Input Test input. This pin must be connected to the 0V level. 98 AVDD1 - - Analog system power supply 99 AVSS1 - - Analog system ground. This pin must be connected to the 0V level. 100 LRREF AO AVDD1/2 Capacitor connection pin for reference voltage for Audio DAC and Electronic Volume. <Note> (1) For unused pins: • The unused input pins must be connected to the GND (0V) level if there is no individual note in the above table. • The unused output pins must be left open (No connection) if there is no individual note in the above table. • The unused input/output pins must be connected to the GND (0V) or power supply pin for I/O block with internal pull down resistor OFF or be left open with internal pull down resistor ON when input pin mode or must be left open (No connection) when output pin mode if there is no individual note in the above table. When you connect an I/O pin which is an input pin with internal pull-down resistor OFF at reset mode to the GND or power supply level, we recommend you to use pull-down resistor or pull-up resistor individually as fail-safe. (2) For power supply pins: • Same voltage level must be supplied to DVDD, AVDD1, AVDD2, XVDD, VVDD2 and VVDD3 power supply pins. (Refer to“Allowable operating ranges”.) (3) For “Reset” condition: • This IC is not reset only by making the RESB pin “Low”. Refer to “Power on and Reset control” for detail of “Reset” condition. (4) For “Analog Source” unused pins (9 pin to 16 pin): • The “Analog Source” unused pins (9 pin to 16 pin) must be connected to the GND (0V) level through the input coupling capacitor. |
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