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74VHCT240AM Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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74VHCT240AM Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 9 page ©1997 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHCT240A Rev. 1.3 2 Connection Diagram Pin Description Logic Symbol IEEE/IEC Truth Tables H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Pin Names Description OE1, OE2 3-STATE Output Enable I0–I7 Inputs O0–O7 Outputs 3-STATE Outputs Inputs Outputs (Pins 12, 14, 16, 18) OE1 In LL H LH L HX Z Inputs Outputs (Pins 3, 5, 7, 9) OE1 In LL H LH L HX Z |
Codice articolo simile - 74VHCT240AM_07 |
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Descrizione simile - 74VHCT240AM_07 |
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