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SMB207A Scheda tecnica(PDF) 10 Page - Summit Microelectronics, Inc. |
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SMB207A Scheda tecnica(HTML) 10 Page - Summit Microelectronics, Inc. |
10 / 27 page SMB206A/7A/8A Preliminary SUMMIT Microelectronics, Inc. 2147 2.4 2/23/2012 10 PVIN = +12V, VDD = +5V, TA = 0°C to +85°C unless otherwise noted. Typical values are +25°C, Note 1,2 Symbol Parameter Conditions 400kHz Min Typ Max Units fSCL SCL clock frequency 0 400 kHz TLOW Clock low period 1.3 µs THIGH Clock high period 0.6 µs tBUF Bus free time between a STOP and a START condition Before new transmission - Note 1 1.3 µs tSU:STA Start condition setup time 0.6 µs tHD:STA Start condition hold time 0.6 µs tSU:STO Stop condition setup time 0.6 µs tR SCL and SDA rise time 20 + 0.1Cb 300 ns tF SCL and SDA fall time 20 + 0.1Cb 300 ns tSU:DAT Data in setup time 100 ns tHD:DAT Data in hold time 0 0.9 µs tN Noise filter SCL and SDA Noise suppression 100 ns Note 1: Parametric tolerances are only guaranteed for factory-programmed settings. Changing configuration settings from that reflected in the customer specific CSIR code may result in inaccuracies exceeding those specified above. Note 2: MIN/MAX limits guaranteed by test, characterization or design. t R t F t HIGH t LOW t SU:STA t HD:STA t SU:DAT t HD:DAT t SU:STO t BUF t DH t AA SCL SDA (IN) SDA (OUT) t WR (For Write Operation Only) I 2C/SMBus SERIAL INTERFACE ELECTRICAL SPECIFICATIONS Figure 7 - I 2C/SMBus TIMING DIAGRAM |
Codice articolo simile - SMB207A |
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Descrizione simile - SMB207A |
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