CXA3197 datasheet(8/30 Pages) SONY

Il numero della parte	CXA3197

Spiegazioni elettronici	10-bit 125MSPS D/A Converter

Download	30 Pages

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Produttore elettronici	SONY [Sony Corporation]

Homepage	http://www.sony.co.jp

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CXA3197R

TTL output High level

clamp.

A TTL level signal is

output from the

DIV2OUT pin in

MUX.1A mode. The

TTL High level voltage

can be clamped to the

value approximately

equivalent to the voltage

applied to this pin.

Leave the VOCLP pin

open for other modes.

VOCLP

Clamp voltage

38

I

DVCC1

DGND1

38

Reset signal polarity

switching.

At High level, the reset

polarity is active Low; at

Low level, active High.

R POLARITY

TTL

39

I

DVCC1

DGND1

39

1.5V

Analog output polarity

inversion.

The analog output is

inverted at Low level.

INV

TTL

40

I

DVCC1

DGND1

40

1.5V

Power saving.

Power saving mode is

activated at Low level.

Normally pull up the PS

pin to High level as this

pin is open Low.

PS

TTL

41

I

DVCC1

42

DVCC1

DGND1

41

Digital power supply.

5V

N.C.

43

Not connected.

DGND1

44

Digital ground.

0V

Pin No.

Symbol

Typical voltage level

Equivalent circuit

Description

I/O

Analog power supply.

AGND2

Single power

supply: GND

Dual power

supply: –5V

37

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