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ST2341A Scheda tecnica(PDF) 1 Page - Stanson Technology |
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ST2341A Scheda tecnica(HTML) 1 Page - Stanson Technology |
1 / 6 page ST2341A P Channel Enhancement Mode MOSFET -6.0A STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com ST2341A 2010. Rev.1 DESCRIPTION ST2341A is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management, other battery powered circuits, and low in-line power loss are required. The product is in a very small outline surface mount package. PIN CONFIGURATION SOT-23-3L 1.Gate 2.Source 3.Drain PART MARKING SOT-23-3L Y: Year Code A: Process Code FEATURE -30V/-6.0A, RDS(ON) = 20m-ohm (Typ.) @VGS = -10V -30V/-3.8A, RDS(ON) = 28m-ohm @VGS = -4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design 3 1 2 D G S 3 1 2 41YA |
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