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UC1625-SP Scheda tecnica(PDF) 11 Page - Texas Instruments |
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UC1625-SP Scheda tecnica(HTML) 11 Page - Texas Instruments |
11 / 21 page EDGE FINDER SHIFT REG S Q Q R S Q Q R PUA PDA PULL DOWN PULL UP FROM DECODER PWM CLK UC1625-SP www.ti.com SLUSAG8A – SEPTEMBER 2011 – REVISED SEPTEMBER 2011 APPLICATION INFORMATION Cross Conduction Prevention The UC1625 inserts delays to prevent cross conduction due to overlapping drive signals. However, some thought must always be given to cross conduction in output stage design because no amount of dead time can prevent fast slewing signals from coupling drive to a power device through a parasitic capacitance. The UC1625 contains input latches that serve as noise blanking filters. These latches remain transparent through any phase of a motor rotation and latch immediately after an input transition is detected. They remain latched for two cycles of the PWM oscillator. At a PWM oscillator speed of 20 kHz, this corresponds to 50 μs to 100 μs of blank time which limits maximum rotational speed to 100 kRPM for a motor with six transitions per rotation or 50 kRPM for a motor with 12 transitions per rotation. This prevents noise generated in the first 50 μs of a transition from propagating to the output transistors and causing cross-conduction or chatter. The UC1625 also contains six flip flops corresponding to the six output drive signals. One of these flip flops is set every time that an output drive signal is turned on, and cleared two PWM oscillator cycles after that drive signal is turned off. The output of each flip flop is used to inhibit drive to the opposing output (Figure 8). In this way, it is impossible to turn on driver PUA and PDA at the same time. It is also impossible for one of these drivers to turn on without the other driver having been off for at least two PWM oscillator clocks. Figure 8. Cross Conduction Prevention Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s) :UC1625-SP |
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