ADC0801S040TS datasheet(6/18 Pages) IDT

Il numero della parte	ADC0801S040TS

Spiegazioni elettronici	Single 8 bits ADC, up to 40 MHz

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Produttore elettronici	IDT [Integrated Device Technology]

Homepage	http://www.idt.com

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6 / 18 page

3ADC0801S040_3

Product data sheet

Rev. 03 — 2 July 2012

6 of 18

Integrated Device Technology

ADC0801S040

Single 8 bits ADC, up to 40 MHz

VDD

supply voltage difference VDDA  VDDD

0.2

-

+0.2

V

VDDD  VDDO

0.2

-

+2.25

V

IDDA

analog supply current

-

4

6

mA

IDDD

digital supply current

-

5

8

mA

IDDO

output supply current

fclk = 40 MHz; ramp input;

CL = 20 pF

-

1

2

mA

Ptot

total power dissipation

VDDA = VDDD = VDDO = 3.3 V

-

30

53

mW

Inputs

Clock input CLK (Referenced to VSSD)[1]

VIL

LOW-level input voltage

0

-

0.3 VDDD

V

VIH

HIGH-level input voltage VDDD  3.6 V

0.6 VDDD

-

VDDD

V

VDDD > 3.6 V

0.7 VDDD

-

VDDD

V

IIL

LOW-level input current

Vclk = 0.3 VDDD

1

0

+1

A

IIH

HIGH-level input current Vclk = 0.7 VDDD

-

5

A

Zi

input impedance

fclk = 40 MHz

-

4

-

k



Ci

input capacitance

fclk = 40 MHz

-

3

-

pF

Input SLEEP (Referenced to VSSD); see Table 8

VIL

LOW-level input voltage

0

-

0.3 VDDD

V

VIH

HIGH-level input voltage VDDD  3.6 V

0.6 VDDD

-

VDDD

V

VDDD > 3.6 V

0.7 VDDD

-

VDDD

V

IIL

LOW-level input current

VIL = 0.3 VDDD

1

-

A

IIH

HIGH-level input current VIH = 0.7 VDDD

-

+1

A

Analog input VI (Referenced to VSSA)

IIL

LOW-level input current

VI = VRB

-

0

-

A

IIH

HIGH-level input current VI = VRT

-

9

-

A

Zi

input impedance

fi = 1 MHz

-

20

-

k



Ci

input capacitance

fi = 1 MHz

-

2

-

pF

Reference voltages for the resistor ladder; see Table 7

VRB

voltage on pin RB

1.1

1.2

-

V

VRT

voltage on pin RT

VRT  VDDA

2.7

3.3

VDDA

V

Vref(dif)

differential reference

voltage

VRT  VRB

1.5

2.1

2.7

V

Iref

reference current

-

0.95

-

mA

Rlad

ladder resistance

-

2.2

-

k



TCRlad

ladder resistor

temperature coefficient

-

4092

-

m

/K

Voffset

offset voltage

BOTTOM

[2] -

170

-

mV

TOP

[2] -

170

-

mV

Vi(a)(p-p)

peak-to-peak analog

input voltage

[3] 1.4

1.76

2.4

V

Table 6.

Characteristics …continued

VDDA = V5 to V6 = 3.3 V; VDDD = V3 to V4 = 3.3 V; VDDO = V20 to V11 = 3.3 V; VSSA, VSSD and VSSO shorted together; Vi(a)(p-p)

= 1.84 V; CL = 20 pF; Tamb = 0 C to 70 C; typical values measured at Tamb = 25 C unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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