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74AC11010 Scheda tecnica(PDF) 1 Page - Texas Instruments |
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74AC11010 Scheda tecnica(HTML) 1 Page - Texas Instruments |
1 / 5 page 54AC11010, 74AC11010 TRIPLE 3INPUT POSITIVENAND GATES SCLS057 − MAY 1987 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 Copyright 1993, Texas Instruments Incorporated 2−1 • Flow-Through Architecture Optimizes PCB Layout • Center-Pin V CC and GND Configurations Minimize High-Speed Switching Noise • EPIC (Enhanced-Performance Implanted CMOS) 1- µm Process • 500-mA Typical Latch-Up Immunity at 125 °C • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain three independent 3-input NAND gates. They perform the Boolean functions Y = A S B S C or Y = A + B + C in positive logic. The 54AC11010 is characterized for operation over the full military temperature range of − 55 °C to 125 °C. The 74AC11010 is characterized for operation from − 40 °C to 85°C. FUNCTION TABLE (each gate) INPUTS OUTPUT A B C OUTPUT Y H H H L L XX H X LX H X X L H 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 1C 1B NC 1A 1Y 54AC11010 . . . FK PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1A 1Y 2Y GND GND 3Y 3C 3B 1B 1C 2A VCC VCC 2B 2C 3A 54AC11010 ...J PACKAGE 74AC11010 ...D OR N PACKAGE (TOP VIEW) NC − No internal connection 2C 3A NC 3B 3C EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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