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AD7994 Scheda tecnica(PDF) 5 Page - Analog Devices |
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AD7994 Scheda tecnica(HTML) 5 Page - Analog Devices |
5 / 28 page AD7992 Rev. 0 | Page 5 of 28 I2C TIMING SPECIFICATIONS Guaranteed by initial characterization. All values measured with the input filtering enabled. CB refers to the capacitive load on the bus line. tr and tf measured between 0.3 VDD and 0.7 VDD. High speed mode timing specifications apply to the AD7992-1 only. Standard and fast mode timing specifications apply to both the AD7992-0 and the AD7992-1. See Figure 2. Unless otherwise noted, VDD = 2.7 V to 5.5 V; REFIN = 2.5 V to VDD; TA =TMIN to TMAX. Table 3. Limit at TMIN, TMAX Parameter Conditions Min Max Unit Description fSCL Standard mode 100 kHz Serial clock frequency Fast mode 400 kHz High speed mode CB = 100 pF max 3.4 MHz CB = 400 pF max 1.7 MHz t1 Standard mode 4 µs tHIGH, SCL high time Fast mode 0.6 µs High speed mode CB = 100 pF max 60 ns CB = 400 pF max 120 ns t2 Standard mode 4.7 µs tLOW, SCL low time Fast mode 1.3 µs High speed mode CB = 100 pF max 160 ns CB = 400 pF max 320 ns t3 Standard mode 250 ns tSU;DAT, data setup time Fast mode 100 ns High speed mode 10 ns t41 Standard mode 0 3.45 µs tHD;DAT, data hold time Fast mode 0 0.9 µs High Speed mode CB = 100 pF max 0 702 ns CB = 400 pF max 0 150 ns t5 Standard mode 4.7 µs tSU;STA, setup time for a repeated START condition Fast mode 0.6 µs High Speed mode 160 ns t6 Standard mode 4 µs tHD;STA, hold time for a repeated START condition Fast mode 0.6 µs High speed mode 160 ns t7 Standard mode 4.7 µs tBUF, bus free time between a STOP and a START condition Fast mode 1.3 µs t8 Standard mode 4 µs tSU;STO, setup time for STOP condition Fast mode 0.6 µs High speed mode 160 ns t9 Standard mode 1000 ns tRDA, rise time of SDA signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 80 ns CB = 400 pF max 20 160 ns |
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