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932S421BFLF Scheda tecnica(PDF) 5 Page - Integrated Device Technology |
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932S421BFLF Scheda tecnica(HTML) 5 Page - Integrated Device Technology |
5 / 23 page IDTTM PCIe Gen2 and QPI Clock for Intel-Based Servers 1340G—01/26/10 ICS932S421B PCIe Gen2 and QPI Clock for Intel-Based Servers 5 Single-ended Output Terminations Test Load CL=5pF Rs Zo ICS932S421B SEPP Output Buffer (Single Ended Push Pull) Rs Zo Rs Zo SEPP Output Buffer (Single Ended Push Pull) CL=5pF CL=5pF The singled-ended outputs of the ICS 932S421B default to a drive strength of 2 loads. The REF clocks can be turned down to 1-load strength via the SMBus. Suggested termination resistors are as follows for transmission lines with Zo = 50 ohms: Driving 1 load, Rs = 33 ohms Driving 2 loads, Rs = 7.5 ohms Single-ended outputs at 1-load strength (REF clock only) Driving 1 load, Rs = 22 ohms Single-ended outputs at 2-load strength (Power up default for all single-ended outputs) |
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