FM1808B – 256Kb Bytewide 5V F-RAM

Rev. 1.2

Mar. 2011

Page 7 of 11

Symbol

Parameter

Min

Max

Units

Notes

Chip Enable Access Time (to data valid)

70

ns

Chip Enable Active Time

70

ns

Read Cycle Time

130

ns

Precharge Time

60

ns

Address Setup Time

0

ns

Address Hold Time

15

ns

Output Enable Access Time

12

ns

Chip Enable to Output High-Z

15

ns

1

Output Enable to Output High-Z

15

ns

1

Symbol

Parameter

Min

Max

Units

Notes

Chip Enable Active Time

70

ns

Chip Enable to Write High

70

ns

Write Cycle Time

130

ns

Precharge Time

60

ns

Address Setup Time

0

ns

Address Hold Time

15

ns

Write Enable Pulse Width

40

ns

Data Setup

30

ns

Data Hold

0

ns

Write Enable Low to Output High Z

15

ns

1

Write Enable High to Output Driven

10

ns

1

Chip Enable to Output High-Z

15

ns

1

Write Enable Setup

0

ns

2

Write Enable Hold

0

ns

2

Notes

1

This parameter is periodically sampled and not 100% tested.

2

The relationship between /CE and /WE determines if a /CE- or /WE-controlled write occurs. There is no timing

specification associated with this relationship.

Data Retention

Symbol

Parameter

Min

Max

Units

Notes

@

+85ºC

10

-

Years

@

+80ºC

19

-

Years

@

+75ºC

38

-

Years