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GS1574A Scheda tecnica(PDF) 11 Page - Gennum Corporation

Il numero della parte GS1574A
Spiegazioni elettronici  HD-LINX II Adaptive Cable Equalizer
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Produttore elettronici  GENNUM [Gennum Corporation]
Homepage  http://www.gennum.com
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GS1574A Scheda tecnica(HTML) 11 Page - Gennum Corporation

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GS1574A HD-LINX® II Adaptive Cable Equalizer
Data Sheet
33416 - 10
August 2011
11 of 16
6. Detailed Description
The GS1574A is a high speed BiCMOS IC designed to equalize serial digital signals.
The GS1574A can equalize both HD and SD serial digital signals, and will typically
equalize 200m of Belden 1694A cable at 1.485Gb/s and 350m at 270Mb/s.
The GS1574A is powered from a single +3.3V power supply and consumes
approximately 215mW of power.
6.1 Serial Digital Inputs
The serial data signal may be connected to the input pins (SDI/SDI) in either a
differential or single ended configuration. AC coupling of the inputs is recommended, as
the SDI and SDI inputs are internally biased at approximately 1.8V.
6.2 Cable Equalization
The input signal passes through a variable gain equalizing stage whose frequency
response closely matches the inverse of the cable loss characteristic. In addition, the
variation of the frequency response with control voltage imitates the variation of the
inverse cable loss characteristic with cable length.
The edge energy of the equalized signal is monitored by a detector circuit which
produces an error signal corresponding to the difference between the desired edge
energy and the actual edge energy. This error signal is integrated by both an internal and
an external AGC filter capacitor providing a steady control voltage for the gain stage. As
the frequency response of the gain stage is automatically varied by the application of
negative feedback, the edge energy of the equalized signal is kept at a constant level
which is representative of the original edge energy at the transmitter. The equalized
signal is also DC restored, effectively restoring the logic threshold of the equalized signal
to its correct level independent of shifts due to AC coupling. The digital output signals
have a nominal voltage of 750mVpp differential, or 375mVpp single ended when
terminated with 50Ω as shown in Figure 6-1.
Figure 6-1: Typical Output Voltage Levels
50
50
SDO
SDO
+187.5mV
-187.5mV
VCM = 2.925V
typical
+187.5mV
-187.5mV
VCM = 2.925V
typical


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