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GS1561 Scheda tecnica(PDF) 3 Page - Gennum Corporation |
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GS1561 Scheda tecnica(HTML) 3 Page - Gennum Corporation |
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3 / 79 page  GS1560A/GS1561 HD-LINX® II Dual-Rate Deserializer Data Sheet 27360 - 12 June 2009 3 of 79 Revision History Contents Key Features........................................................................................................................................................1 Applications.........................................................................................................................................................1 Description...........................................................................................................................................................1 Functional Block Diagrams ............................................................................................................................2 1. Pin Out...............................................................................................................................................................6 1.1 Pin Assignment GS1560A ...............................................................................................................6 1.2 Pin Assignment GS1561 ..................................................................................................................7 1.3 Pin Descriptions .................................................................................................................................8 2. Electrical Characteristics ......................................................................................................................... 19 2.1 Absolute Maximum Ratings........................................................................................................ 19 2.2 DC Electrical Characteristics ...................................................................................................... 19 2.3 AC Electrical Characteristics ...................................................................................................... 21 3. Input/Output Circuits ............................................................................................................................... 24 3.1 Host Interface Map......................................................................................................................... 26 3.1.1 Host Interface Map (R/W Configurable Registers) ................................................. 27 3.1.2 Host Interface Map (Read Only Registers) ................................................................ 28 4. Detailed Description.................................................................................................................................. 29 Version ECR PCN Date Changes and / or Modifications 12 152053 – June 2009 Removed ‘Proprietary & Confidential’ from the footer. 11 150195 50711 July 2008 DVB_ASI operation specification change in Master mode. 10 143666 42774 January 2007 Recommended the new GO1555 VCO for new designs. 9 140423 39452 May 2006 Corrected minor typing errors in Functional Block Diagram. Modified video format numbers for system 1125 on Table 4-4: Switch Line Position for Digital Systems. 8 137405 – September 2005 Conversion to Data Sheet. Added note on max device power and current to Table 2-1: DC Electrical Characteristics. Corrected Solder Reflow Profile labels. 7 136978 – June 2005 Restored missing overlines to pin names. Corrected missing TERM pin in Serial Digital Input connection diagram. Rephrased RoHS compliance statement. 6 134906 – April 2005 Added Solder Reflow Profile description. Clarified setting of VD_STD[4:0], INT_PROG and STD_LOCK bits following a reset and/or removal of input. Minor correction to Typical Application Circuits for both parts. Added DVB-ASI Packet Counter information. Added Packaging Data section. Changed ‘Green’ references to RoHS Compliant. |
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