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GS1531 Scheda tecnica(PDF) 6 Page - Gennum Corporation

Il numero della parte GS1531
Spiegazioni elettronici  Multi-Rate Serializer with ClockCleaner
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Produttore elettronici  GENNUM [Gennum Corporation]
Homepage  http://www.gennum.com
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GS1531 Scheda tecnica(HTML) 6 Page - Gennum Corporation

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GS1531 Data Sheet
30573 - 7
February 2008
6 of 50
1.2 Pin Descriptions
Table 1-1: Pin Descriptions
Pin
Number
Name
Timing
Type
Description
A1
LF
Analog
Output
Control voltage to external voltage controlled oscillator. Nominally +1.25V
DC.
A2
VCO_VCC
Output
Power
Power supply for the external voltage controlled oscillator. Connect to pin
7 of the GO1555/GO1525*. This pin is an output.
Should be isolated from all other power supplies.
*For new designs use GO1555
A3
VCO_GND
Output
Power
Ground reference for the external voltage controlled oscillator. Connect to
pins 2, 4, 6, and 8 of the GO1555/GO1525*. This pin is an output.
Should be isolated from all other grounds.
*For new designs use GO1555
A4, A5
VCO, VCO
Analog
Input
Differential inputs for the external VCO reference signal. For single ended
devices such as the GO1555/GO1525*, VCO should be AC coupled to
VCO_GND.
VCO is nominally 1.485GHz.
*For new designs use GO1555
A6, B5,
B6, C1,
C4, C5,
C6, C7,
C8, D1,
D2, D3,
D4, D7,
D8, E1,
E2, E3,
E7, F2,
F3, F7,
G1, G2,
G3, G7,
H1, H2,
H3, H7,
J1, J2,
J3, J4
NC
No connect.
A7
PCLK
Input
PARALLEL DATA BUS CLOCK
Signal levels are LVCMOS/LVTTL compatible.
HD 20-bit mode
PCLK = 74.25MHz or 74.25/1.001MHz
HD 10-bit mode
PCLK = 148.5MHz or 148.5/1.001MHz
SD 20-bit mode
PCLK = 13.5MHz
SD 10-bit mode
PCLK = 27MHz
A8, E8, K8
IO_VDD
Power
Power supply connection for digital I/O buffers. Connect to +3.3V DC
digital.


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