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5V19EE604NDGI8 Scheda tecnica(PDF) 4 Page - Integrated Device Technology |
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5V19EE604NDGI8 Scheda tecnica(HTML) 4 Page - Integrated Device Technology |
4 / 29 page IDT5V19EE604 EEPROM PROGRAMMABLE VCXO CLOCK GENERATOR CLOCK SYNTHESIZER IDT® EEPROM PROGRAMMABLE VCXO CLOCK GENERATOR 4 IDT5V19EE604 REV F 022310 12 OUT5b O LVTTL1 Configurable clock output 5b. Output levels controlled by VDDO5. 13 VDDO5 Power Device power supply. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT5 and OUT5b. 14 GND Power Connect to Ground. 15 SDAT I/O LVTTL Bidirectional I2C data. 16 SCLK I LVTTL I2C clock. 17 CLKSEL I LVTTL Input clock selector. Weak internal pull down resistor. 18 AVDD Power Device analog power supply. Connect to 3.3V. Use filtered analog power supply if available. 19 GND Power Connect to Ground. 20 OUT6 O LVTTL Configurable clock output 6. Output levels controlled by VDDO3. 21 OUT3 O LVTTL Configurable clock output 3. Output levels controlled by VDDO3. 22 VDDO3 Power Device power supply. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT3 and OUT6. 23 SEL2 I LVTTL Configuration select pin. Weak internal pull down resistor. 24 SEL1 I LVTTL Configuration select pin. Weak internal pull down resistor. 25 SEL0 I LVTTL Configuration select pin. Weak internal pull down resistor. 26 SD/OE I LVTTL Enables/disables the outputs or powers down the chip. The SP bit (0x02) controls the polarity of the signal to be either active HIGH or LOW. (Default is active HIGH.) 27 GND Power Connect to Ground. 28 VDD Power Device power supply. Connect to 3.3V. 1.When only an individual single-ended clock output is required, tie OUT# and OUT#b together. Pin# Pin Name I/O Pin Type Pin Description |
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