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FAN9611 Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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FAN9611 Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 37 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN9611 / FAN9612 • Rev. 1.1.3 2 Ordering Information Part Number Package Packing Method Packing Quantity FAN9611MX 16-Lead, Small Outline Integrated Circuit (SOIC) Tape and Reel 2,500 FAN9612MX 16-Lead, Small Outline Integrated Circuit (SOIC) Tape and Reel 2,500 This device passed wave soldering test by JESD22A-111. Package Outlines Figure 2. SOIC-16 (Top View) Thermal Resistance Table Package Suffix Thermal Resistance ΘJL (1) ΘJA (2) 16-Lead SOIC M 35°C/W 50 – 120°C/W (3) Notes: 1. Typical ΘJL is specified from semiconductor junction to lead. 2. Typical ΘJA is dependent on the PCB design and operating conditions, such as air flow. The range of values covers a variety of operating conditions utilizing natural convection with no heatsink on the package. 3. This typical range is an estimate; actual values depend on the application. |
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