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FQPF13N50C Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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FQPF13N50C Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
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2 / 17 page  AN-8027 © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com Rev. 1.0.0 • 8/26/09 2 Functional Description Gain Modulator The gain modulator is the key block for PFC stage because it provides the reference to the current control error amplifier for the input current shaping, as shown in Figure 2. The output current of gain modulator is a function of VEA, IAC , and VRMS. The gain of the gain modulator is given in the datasheet as a ratio between IMO and IAC with a given VRMS when VEA is saturated to HIGH. The gain is inversely proportional to VRMS 2, as shown in Figure 3, to implement line feed-forward. This automatically adjusts the reference of current control error amplifier according to the line voltage such that the input power of PFC converter is not changed with line voltage. ISENS E IA C VRMS VEA 2 (0.7) (0.7) MO AC EA AC MAX RMS EA IG I KV I VV =⋅ ⋅− =⋅ − IEA R M R M Gain Modulator R RMS1 R RMS2 R RMS3 C RMS1 C RMS2 R IAC I AC V IN I L x 2 k Figure 2. Gain Modulator Block V RMS V RMS-UVP 2 1 RMS G V ∝ Figure 3. Modulation Gain Characteristics To sense the RMS value of the line voltage, an averaging circuit with two poles is typically employed, as shown in Figure 2. The voltage of VRMS pin in normal PFC operation is given as: 3 12 3 2 2 π =⋅ ++ RMS RMS LINE RMS RMS RMS R VV RR R (1) where VLINE is RMS value of line voltage. However, once PFC stops switching operation, the junction capacitance of bridge diode is not discharged and VIN of Figure 2 is clamped at the peak of the line voltage. Then, the voltage of VRMS pin is given by: 3 12 3 2 NS RMS RMS LINE RMS RMS RMS R VV RR R = ++ (2) Therefore, the voltage divider for VRMS should be designed considering the brownout protection trip point and minimum operation line voltage. PFC runs PFC stops V IN V RMS Figure 4. VRMS According to the PFC Operation The rectified sinusoidal signal is obtained by the current flowing into the IAC pin. The resistor RIAC should be large enough to prevent saturation of the gain modulator as: . 2 159 MAX LINE BO IAC V GA R μ ⋅< (3) where VLINE.BO is the line voltage that trips brownout protection, GMAX is the maximum modulator gain when VRMS is 1.08V (which can be found in the datasheet), and 159µA is the maximum output current of the gain modulator. Current and Voltage Control of Boost Stage As shown in Figure 5, the FAN480X employs two control loops for power factor correction: a current control loop and a voltage control loop. The current control loop shapes inductor current, as shown in Figure 6, based on the reference signal obtained at the IAC pin as: 1 LCS MO M AC M I RI R I G R ⋅ =⋅ = ⋅ ⋅ (4) |
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