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LC78833M Scheda tecnica(PDF) 10 Page - Sanyo Semicon Device |
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LC78833M Scheda tecnica(HTML) 10 Page - Sanyo Semicon Device |
10 / 11 page Application Circuit Example Note 1. VDD and Vref H must be provided from a low-impedance, high-stability power supply, for example, a commercial three-terminal regulator or equivalent. 2. Since it is possible for the IC to latch up if there is a discrepancy between the pin 4 (AVDD) and pin 10 (DVDD) power supply power-on timing, application circuits should be designed so that there is no time difference between the application of these voltages. 3. Bypass capacitors of at least 47 µF must be inserted between AVDD and AGND and between DVDD and DGND. These capacitor must be placed as close as possible to the IC. 4. Bypass capacitors of at least 10 µF must be inserted between REFH and AGND and between REFL and AGND for reference voltage stability. No. 5212-10/11 LC78833M, 78833V |
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